diff options
| author | Kathiravan T <quic_kathirav@quicinc.com> | 2023-05-19 19:08:43 +0530 |
|---|---|---|
| committer | Bjorn Andersson <andersson@kernel.org> | 2023-06-13 15:08:52 -0700 |
| commit | 66d141a15c19f89e7e259e57a007550a253e03d2 (patch) | |
| tree | fc307f010b7365cd1174a79d74d9c37e0396356c /arch/arm64/boot/dts/qcom/ipq5332.dtsi | |
| parent | b59cd2902c58969230a8aca67a10ac3fbde0af15 (diff) | |
arm64: dts: qcom: ipq5332: define UART1
Add the definition for the UART1 found on IPQ5332 SoC.
Reviewed-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230519133844.23512-3-quic_kathirav@quicinc.com
Diffstat (limited to 'arch/arm64/boot/dts/qcom/ipq5332.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/qcom/ipq5332.dtsi | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/qcom/ipq5332.dtsi b/arch/arm64/boot/dts/qcom/ipq5332.dtsi index 47984037f0a5..e7d3ec7a5750 100644 --- a/arch/arm64/boot/dts/qcom/ipq5332.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq5332.dtsi @@ -225,6 +225,18 @@ status = "disabled"; }; + blsp1_uart1: serial@78b0000 { + compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; + reg = <0x078b0000 0x200>; + interrupts = <GIC_SPI 291 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&gcc GCC_BLSP1_UART2_APPS_CLK>, + <&gcc GCC_BLSP1_AHB_CLK>; + clock-names = "core", "iface"; + dmas = <&blsp_dma 2>, <&blsp_dma 3>; + dma-names = "tx", "rx"; + status = "disabled"; + }; + blsp1_spi0: spi@78b5000 { compatible = "qcom,spi-qup-v2.2.1"; reg = <0x078b5000 0x600>; |