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authorAndy Gross <agross@codeaurora.org>2015-08-27 15:39:14 -0500
committerAndy Gross <agross@codeaurora.org>2015-10-13 21:53:02 -0500
commit9f43020dc43e326203ce036ad19e6608ddb421f2 (patch)
tree8fd2ed19785b42379b8ca55d95a91720c5f1e29d /arch/arm64/boot/dts/qcom/msm8916-pins.dtsi
parentf6d24bf30c00e273276a3790c3c50d192f850788 (diff)
arm64: dts: qcom: Add 8x16 Serial UART1 node
This patch adds the nodes required to support the UART1 node on the MSM8916 and also fixes the sleep pins function for UART2. Signed-off-by: Andy Gross <agross@codeaurora.org>
Diffstat (limited to 'arch/arm64/boot/dts/qcom/msm8916-pins.dtsi')
-rw-r--r--arch/arm64/boot/dts/qcom/msm8916-pins.dtsi26
1 files changed, 25 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi b/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi
index 568956859088..42941b977c48 100644
--- a/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi
@@ -13,6 +13,30 @@
&msmgpio {
+ blsp1_uart1_default: blsp1_uart1_default {
+ pinmux {
+ function = "blsp_uart1";
+ pins = "gpio0", "gpio1";
+ };
+ pinconf {
+ pins = "gpio0", "gpio1";
+ drive-strength = <16>;
+ bias-disable;
+ };
+ };
+
+ blsp1_uart1_sleep: blsp1_uart1_sleep {
+ pinmux {
+ function = "gpio";
+ pins = "gpio0", "gpio1";
+ };
+ pinconf {
+ pins = "gpio0", "gpio1";
+ drive-strength = <2>;
+ bias-pull-down;
+ };
+ };
+
blsp1_uart2_default: blsp1_uart2_default {
pinmux {
function = "blsp_uart2";
@@ -27,7 +51,7 @@
blsp1_uart2_sleep: blsp1_uart2_sleep {
pinmux {
- function = "blsp_uart2";
+ function = "gpio";
pins = "gpio4", "gpio5";
};
pinconf {