diff options
| author | Dmitry Baryshkov <dmitry.baryshkov@linaro.org> | 2023-12-05 06:25:44 +0300 |
|---|---|---|
| committer | Bjorn Andersson <andersson@kernel.org> | 2023-12-15 23:13:11 -0600 |
| commit | f63ba6aa80f520678f35640b347e75c46bd49612 (patch) | |
| tree | 5d438627e00fb6ee6ca4e6f9683608ff6817d224 /arch/arm64/boot/dts/qcom/msm8996.dtsi | |
| parent | 0f6f5a220543d1239dc7fc04c9f8f8885fa05637 (diff) | |
arm64: dts: qcom: msm8996: switch UFS QMP PHY to new style of bindings
Change the UFS QMP PHY to use newer style of QMP PHY bindings (single
resource region, no per-PHY subnodes).
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20231205032552.1583336-2-dmitry.baryshkov@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Diffstat (limited to 'arch/arm64/boot/dts/qcom/msm8996.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/qcom/msm8996.dtsi | 25 |
1 files changed, 9 insertions, 16 deletions
diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi index 35a0d2a69711..d3d01c1e1fbc 100644 --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi @@ -780,9 +780,9 @@ <&pciephy_1>, <&pciephy_2>, <&usb3phy>, - <&ufsphy_lane 0>, - <&ufsphy_lane 1>, - <&ufsphy_lane 2>; + <&ufsphy 0>, + <&ufsphy 1>, + <&ufsphy 2>; clock-names = "cxo", "cxo2", "sleep_clk", @@ -2047,7 +2047,7 @@ reg = <0x00624000 0x2500>; interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>; - phys = <&ufsphy_lane>; + phys = <&ufsphy>; phy-names = "ufsphy"; power-domains = <&gcc UFS_GDSC>; @@ -2100,25 +2100,18 @@ ufsphy: phy@627000 { compatible = "qcom,msm8996-qmp-ufs-phy"; - reg = <0x00627000 0x1c4>; - #address-cells = <1>; - #size-cells = <1>; - ranges; + reg = <0x00627000 0x1000>; clocks = <&gcc GCC_UFS_CLKREF_CLK>; clock-names = "ref"; resets = <&ufshc 0>; reset-names = "ufsphy"; - status = "disabled"; - ufsphy_lane: phy@627400 { - reg = <0x627400 0x12c>, - <0x627600 0x200>, - <0x627c00 0x1b4>; - #clock-cells = <1>; - #phy-cells = <0>; - }; + #clock-cells = <1>; + #phy-cells = <0>; + + status = "disabled"; }; camss: camss@a34000 { |