diff options
| author | Dmitry Baryshkov <dmitry.baryshkov@linaro.org> | 2022-05-06 18:21:04 +0300 |
|---|---|---|
| committer | Bjorn Andersson <andersson@kernel.org> | 2022-08-29 15:14:16 -0500 |
| commit | 3e4fec3bc8f8d1366cf2d8d8a054ed37e5a41cba (patch) | |
| tree | 0c78a1d54bcc627bceea3ae9c617edd3c8de04fc /arch/arm64/boot/dts/qcom/qcs404.dtsi | |
| parent | ca1ce7207e53cfe69aee5002eb3795069668da53 (diff) | |
arm64: dts: qcom: stop using snps,dw-pcie falback
Qualcomm PCIe devices are not really compatible with the snps,dw-pcie.
Unlike the generic IP core, they have special requirements regarding
enabling clocks, toggling resets, using the PHY, etc.
This is not to mention that platform snps-dw-pcie driver expects to find
two IRQs declared, while Qualcomm platforms use just one.
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220506152107.1527552-6-dmitry.baryshkov@linaro.org
Diffstat (limited to 'arch/arm64/boot/dts/qcom/qcs404.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/qcom/qcs404.dtsi | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/qcom/qcs404.dtsi b/arch/arm64/boot/dts/qcom/qcs404.dtsi index 9ab990061522..1881d810a429 100644 --- a/arch/arm64/boot/dts/qcom/qcs404.dtsi +++ b/arch/arm64/boot/dts/qcom/qcs404.dtsi @@ -1297,7 +1297,7 @@ }; pcie: pci@10000000 { - compatible = "qcom,pcie-qcs404", "snps,dw-pcie"; + compatible = "qcom,pcie-qcs404"; reg = <0x10000000 0xf1d>, <0x10000f20 0xa8>, <0x07780000 0x2000>, |