diff options
| author | Bhupesh Sharma <bhupesh.sharma@linaro.org> | 2022-05-15 03:24:23 +0530 |
|---|---|---|
| committer | Bjorn Andersson <bjorn.andersson@linaro.org> | 2022-07-02 22:17:02 -0500 |
| commit | afcbe252e9c19161e4d4c95f33faaf592f1de086 (patch) | |
| tree | 7843b71c19a2c8edc8bef86c5dc5cb4ed1707051 /arch/arm64/boot/dts/qcom/qcs404.dtsi | |
| parent | 4ff12270dbbe245cf92c0247bcc1a2bfbc03639c (diff) | |
arm64: dts: qcom: Fix 'reg-names' for sdhci nodes
Since the Qualcomm sdhci-msm device-tree binding has been converted
to yaml format, 'make dtbs_check' reports a number of issues with
ordering of 'reg-names' as various possible combinations
are possible for different qcom SoC dts files.
Fix the same by updating the offending 'dts' files.
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Rob Herring <robh@kernel.org>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220514215424.1007718-6-bhupesh.sharma@linaro.org
Diffstat (limited to 'arch/arm64/boot/dts/qcom/qcs404.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/qcom/qcs404.dtsi | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/qcom/qcs404.dtsi b/arch/arm64/boot/dts/qcom/qcs404.dtsi index badfd934fdb5..aea956e3d5f8 100644 --- a/arch/arm64/boot/dts/qcom/qcs404.dtsi +++ b/arch/arm64/boot/dts/qcom/qcs404.dtsi @@ -809,7 +809,7 @@ sdcc1: mmc@7804000 { compatible = "qcom,qcs404-sdhci", "qcom,sdhci-msm-v5"; reg = <0x07804000 0x1000>, <0x7805000 0x1000>; - reg-names = "hc", "cqhci"; + reg-names = "hc_mem", "cqe_mem"; interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; |