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authorRoja Rani Yarubandi <rojay@codeaurora.org>2021-09-23 17:46:15 +0530
committerBjorn Andersson <bjorn.andersson@linaro.org>2021-09-24 17:40:20 -0500
commit38cd93f413fd946fa39b83d3283a6a2a21ca0789 (patch)
tree3d3b24d49db6e8e2940c14c044642175086a63b1 /arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
parentbf6f37a3086bec4c103dc4a478b25c9adf8dd671 (diff)
arm64: dts: qcom: sc7280: Update QUPv3 UART5 DT node
Uart5 is treated as dedicated debug uart.Change the compatible as "qcom,geni-uart" in SoC DT to make it generic and later update it as "qcom,geni-debug-uart" in sc7280-idp Add interconnects and power-domains. Split the pinctrl functions and correct the gpio pins. Signed-off-by: Roja Rani Yarubandi <rojay@codeaurora.org> Signed-off-by: Rajesh Patil <rajpat@codeaurora.org> Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1632399378-12229-6-git-send-email-rajpat@codeaurora.org
Diffstat (limited to 'arch/arm64/boot/dts/qcom/sc7280-idp.dtsi')
-rw-r--r--arch/arm64/boot/dts/qcom/sc7280-idp.dtsi19
1 files changed, 8 insertions, 11 deletions
diff --git a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
index 52974796d69e..c93e21819021 100644
--- a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
@@ -279,6 +279,7 @@
};
&uart5 {
+ compatible = "qcom,geni-debug-uart";
status = "okay";
};
@@ -347,18 +348,14 @@
bias-pull-up;
};
-&qup_uart5_default {
- tx {
- pins = "gpio46";
- drive-strength = <2>;
- bias-disable;
- };
+&qup_uart5_tx {
+ drive-strength = <2>;
+ bias-disable;
+};
- rx {
- pins = "gpio47";
- drive-strength = <2>;
- bias-pull-up;
- };
+&qup_uart5_rx {
+ drive-strength = <2>;
+ bias-pull-up;
};
&sdc1_on {