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authorKonrad Dybcio <konrad.dybcio@linaro.org>2024-02-17 14:00:07 +0100
committerBjorn Andersson <andersson@kernel.org>2024-03-17 11:52:56 -0500
commit9fa6a0bad7077cac60ba98d801e13a74581ec46a (patch)
tree638e268987f216a6af7346d7829caf8c9986b06a /arch/arm64/boot/dts/qcom/sc8280xp.dtsi
parent629c635eafbaf18260c8083360745c71674640d2 (diff)
arm64: dts: qcom: sc8280xp: Add missing LMH interrupts
Hook up the interrupts that signal the Limits Management Hardware has started some sort of throttling action. In testing, you may notice the A78C cluster throttle IRQ fire count stays at zero. After an hour of painful experiments on an X13s, I was able to get that cluster to heat up near 90 degC, after which the IRQ has indeed fired. So it stands to reason that the heat output difference between the A78C and X1C clusters is so massive that LMH rarely decides to throttle the "little" one based on its power metrics. Fixes: 152d1faf1e2f ("arm64: dts: qcom: add SC8280XP platform") Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20240217-topic-8280_lmh-v1-1-d72dd4fedfb8@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Diffstat (limited to 'arch/arm64/boot/dts/qcom/sc8280xp.dtsi')
-rw-r--r--arch/arm64/boot/dts/qcom/sc8280xp.dtsi5
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
index a5b194813079..daaf054efca3 100644
--- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
@@ -4966,6 +4966,11 @@
<0 0x18592000 0 0x1000>;
reg-names = "freq-domain0", "freq-domain1";
+ interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "dcvsh-irq-0",
+ "dcvsh-irq-1";
+
clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GCC_GPLL0>;
clock-names = "xo", "alternate";