diff options
| author | Taniya Das <tdas@codeaurora.org> | 2018-12-05 13:30:36 +0530 |
|---|---|---|
| committer | Andy Gross <andy.gross@linaro.org> | 2019-01-24 22:18:42 -0600 |
| commit | 0cef5dd4035fb856a0b4676283d90f093ecd0148 (patch) | |
| tree | d29bcb828f9ef52737d8649d8017a453f36652f5 /arch/arm64/boot/dts/qcom | |
| parent | 05556681948be46422618e662edd69d719f6b109 (diff) | |
arm64: dts: sdm845: Add lpasscc node
This adds the low pass audio clock controller node to sdm845 based on
the example in the bindings.
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Taniya Das <tdas@codeaurora.org>
[bjorn: Disabled lpasscc node, as it's normally protected]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Diffstat (limited to 'arch/arm64/boot/dts/qcom')
| -rw-r--r-- | arch/arm64/boot/dts/qcom/sdm845-mtp.dts | 4 | ||||
| -rw-r--r-- | arch/arm64/boot/dts/qcom/sdm845.dtsi | 9 |
2 files changed, 12 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/qcom/sdm845-mtp.dts b/arch/arm64/boot/dts/qcom/sdm845-mtp.dts index 55292f2f1552..ebf059eb7ffc 100644 --- a/arch/arm64/boot/dts/qcom/sdm845-mtp.dts +++ b/arch/arm64/boot/dts/qcom/sdm845-mtp.dts @@ -347,7 +347,9 @@ &gcc { protected-clocks = <GCC_QSPI_CORE_CLK>, <GCC_QSPI_CORE_CLK_SRC>, - <GCC_QSPI_CNOC_PERIPH_AHB_CLK>; + <GCC_QSPI_CNOC_PERIPH_AHB_CLK>, + <GCC_LPASS_Q6_AXI_CLK>, + <GCC_LPASS_SWAY_CLK>; }; &i2c10 { diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi index b86ba0d7feda..b5dc7c0e9d5a 100644 --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi @@ -7,6 +7,7 @@ #include <dt-bindings/clock/qcom,dispcc-sdm845.h> #include <dt-bindings/clock/qcom,gcc-sdm845.h> +#include <dt-bindings/clock/qcom,lpass-sdm845.h> #include <dt-bindings/clock/qcom,gpucc-sdm845.h> #include <dt-bindings/clock/qcom,rpmh.h> #include <dt-bindings/clock/qcom,videocc-sdm845.h> @@ -2008,6 +2009,14 @@ <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>; }; + lpasscc: clock-controller@17014000 { + compatible = "qcom,sdm845-lpasscc"; + reg = <0x17014000 0x1f004>, <0x17300000 0x200>; + reg-names = "cc", "qdsp6ss"; + #clock-cells = <1>; + status = "disabled"; + }; + apss_shared: mailbox@17990000 { compatible = "qcom,sdm845-apss-shared"; reg = <0x17990000 0x1000>; |