diff options
author | Fabrizio Castro <fabrizio.castro@bp.renesas.com> | 2019-06-18 16:18:39 +0100 |
---|---|---|
committer | Simon Horman <horms+renesas@verge.net.au> | 2019-06-19 16:04:03 +0200 |
commit | 89d6adc63f859b45eb961d86a451e38b679143a5 (patch) | |
tree | b393ca23bd80aeee4850f83d636a167103f18e72 /arch/arm64/boot/dts/renesas/hihope-common.dtsi | |
parent | 8c965642354950cd17d1edff57fd5ca965040517 (diff) |
arm64: dts: renesas: hihope-common: Add HDMI support
Add HDMI support to the HiHope RZ/G2[MN] mother board common
dtsi.
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'arch/arm64/boot/dts/renesas/hihope-common.dtsi')
-rw-r--r-- | arch/arm64/boot/dts/renesas/hihope-common.dtsi | 61 |
1 files changed, 61 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/renesas/hihope-common.dtsi b/arch/arm64/boot/dts/renesas/hihope-common.dtsi index 625c3aaead14..9f05e80cee10 100644 --- a/arch/arm64/boot/dts/renesas/hihope-common.dtsi +++ b/arch/arm64/boot/dts/renesas/hihope-common.dtsi @@ -17,6 +17,17 @@ stdout-path = "serial0:115200n8"; }; + hdmi0-out { + compatible = "hdmi-connector"; + type = "a"; + + port { + hdmi0_con: endpoint { + remote-endpoint = <&rcar_dw_hdmi0_out>; + }; + }; + }; + leds { compatible = "gpio-leds"; @@ -82,6 +93,30 @@ states = <3300000 1 1800000 0>; }; + + x302_clk: x302-clock { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <33000000>; + }; + + x304_clk: x304-clock { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <25000000>; + }; +}; + +&du { + clocks = <&cpg CPG_MOD 724>, + <&cpg CPG_MOD 723>, + <&cpg CPG_MOD 722>, + <&versaclock5 1>, + <&x302_clk>, + <&versaclock5 2>; + clock-names = "du.0", "du.1", "du.2", + "dclkin.0", "dclkin.1", "dclkin.2"; + status = "okay"; }; &ehci0 { @@ -109,11 +144,37 @@ }; }; +&hdmi0 { + status = "okay"; + + ports { + port@1 { + reg = <1>; + rcar_dw_hdmi0_out: endpoint { + remote-endpoint = <&hdmi0_con>; + }; + }; + }; +}; + &hsusb { dr_mode = "otg"; status = "okay"; }; +&i2c4 { + clock-frequency = <400000>; + status = "okay"; + + versaclock5: clock-generator@6a { + compatible = "idt,5p49v5923"; + reg = <0x6a>; + #clock-cells = <1>; + clocks = <&x304_clk>; + clock-names = "xin"; + }; +}; + &ohci0 { status = "okay"; }; |