diff options
| author | Geert Uytterhoeven <geert+renesas@glider.be> | 2020-02-18 14:30:19 +0100 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2020-02-21 14:41:36 +0100 |
| commit | 721b76195b31467e56851fbab3855e700f281270 (patch) | |
| tree | 892fdec875ad18f826fe9e0e879f6108bd3431ab /arch/arm64/boot/dts/renesas/r8a774b1.dtsi | |
| parent | d745c72da921acdf38d68681d5fc2ff113b78f55 (diff) | |
arm64: dts: renesas: rzg2: Add reset control properties for display
Add reset control properties to the device nodes for the Display Units
on all supported RZ/G2 SoCs. Note that on these SoCs, there is only a
single reset for each pair of DU channels.
Join the clocks lines while at it, to increase uniformity.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Link: https://lore.kernel.org/r/20200218133019.22299-5-geert+renesas@glider.be
Diffstat (limited to 'arch/arm64/boot/dts/renesas/r8a774b1.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/renesas/r8a774b1.dtsi | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/arch/arm64/boot/dts/renesas/r8a774b1.dtsi b/arch/arm64/boot/dts/renesas/r8a774b1.dtsi index 93dd10b5d6d0..3137f735974b 100644 --- a/arch/arm64/boot/dts/renesas/r8a774b1.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a774b1.dtsi @@ -2480,10 +2480,11 @@ interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 724>, - <&cpg CPG_MOD 723>, + clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>, <&cpg CPG_MOD 721>; clock-names = "du.0", "du.1", "du.3"; + resets = <&cpg 724>, <&cpg 722>; + reset-names = "du.0", "du.3"; status = "disabled"; renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd0 1>; |