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| author | Jacopo Mondi <jacopo+renesas@jmondi.org> | 2019-07-06 16:07:30 +0200 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2019-08-21 14:18:56 +0200 |
| commit | 38290431d56d7d3928ac89e9f8d3d6b3c8df4c6e (patch) | |
| tree | 36bad5f94cf7263e6a750d6f121c90bd9b0bec43 /arch/arm64/boot/dts/renesas/r8a774c0.dtsi | |
| parent | fe9841595c604ce942c3729a72411096c3f4b675 (diff) | |
arm64: dts: renesas: Update 'vsps' properties for readability
Update the 'vsps' property in the R-Car Gen3 SoC device tree files to
match what's in the documentation example.
Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Reviewed-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'arch/arm64/boot/dts/renesas/r8a774c0.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/renesas/r8a774c0.dtsi | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/renesas/r8a774c0.dtsi b/arch/arm64/boot/dts/renesas/r8a774c0.dtsi index d0c9b419d190..a1c2de90e470 100644 --- a/arch/arm64/boot/dts/renesas/r8a774c0.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a774c0.dtsi @@ -1811,7 +1811,7 @@ clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>; clock-names = "du.0", "du.1"; - vsps = <&vspd0 0 &vspd1 0>; + vsps = <&vspd0 0>, <&vspd1 0>; status = "disabled"; ports { |