diff options
| author | Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> | 2020-05-19 23:13:19 +0300 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2020-07-13 10:48:01 +0200 |
| commit | 3b674382df13b75afbb855745f48f7f79f21518c (patch) | |
| tree | 9537671875af7da9e05574335e4ef8367907aa6d /arch/arm64/boot/dts/renesas/r8a77980.dtsi | |
| parent | b7f13b914730026ca7fdc0d5ef6a791f3c613fe2 (diff) | |
arm64: dts: renesas: r8a77980: Add RPC-IF support
Describe RPC-IF in the R8A77980 device tree.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Link: https://lore.kernel.org/r/f18853d9-8ef9-717a-9039-2191b26e579f@cogentembedded.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'arch/arm64/boot/dts/renesas/r8a77980.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/renesas/r8a77980.dtsi | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/renesas/r8a77980.dtsi b/arch/arm64/boot/dts/renesas/r8a77980.dtsi index 387e6d99f2f3..59f5bbd72161 100644 --- a/arch/arm64/boot/dts/renesas/r8a77980.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a77980.dtsi @@ -1344,6 +1344,23 @@ status = "disabled"; }; + rpc: spi@ee200000 { + compatible = "renesas,r8a77980-rpc-if", + "renesas,rcar-gen3-rpc-if"; + reg = <0 0xee200000 0 0x200>, + <0 0x08000000 0 0x4000000>, + <0 0xee208000 0 0x100>; + reg-names = "regs", "dirmap", "wbuf"; + interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 917>; + clock-names = "rpc"; + power-domains = <&sysc R8A77980_PD_ALWAYS_ON>; + resets = <&cpg 917>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + gic: interrupt-controller@f1010000 { compatible = "arm,gic-400"; #interrupt-cells = <3>; |