diff options
| author | Geert Uytterhoeven <geert+renesas@glider.be> | 2017-07-20 14:54:37 +0200 |
|---|---|---|
| committer | Simon Horman <horms+renesas@verge.net.au> | 2017-09-18 11:02:11 +0200 |
| commit | 5889ded170cd5b6f5a9449956288d069074b20c4 (patch) | |
| tree | 01acbe008be55f0e4c5998f452d323bdc4103fab /arch/arm64/boot/dts/renesas/r8a77995.dtsi | |
| parent | 9066b042b4502f711c5207662ec0d26be1732aff (diff) | |
arm64: dts: renesas: r8a77995: Use r8a7795-cpg-mssr binding definitions
Replace the hardcoded clock indices by R8A77995_CLK_* symbols.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'arch/arm64/boot/dts/renesas/r8a77995.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/renesas/r8a77995.dtsi | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi b/arch/arm64/boot/dts/renesas/r8a77995.dtsi index a5b769b840e9..84b6bd58eafb 100644 --- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi @@ -9,7 +9,7 @@ * kind, whether express or implied. */ -#include <dt-bindings/clock/renesas-cpg-mssr.h> +#include <dt-bindings/clock/r8a77995-cpg-mssr.h> #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/power/r8a77995-sysc.h> @@ -145,7 +145,7 @@ reg = <0 0xe6e88000 0 64>; interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 310>, - <&cpg CPG_CORE 16>, + <&cpg CPG_CORE R8A77995_CLK_S3D1C>, <&scif_clk>; clock-names = "fck", "brg_int", "scif_clk"; power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; |