diff options
| author | Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> | 2022-10-10 00:00:40 +0100 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2022-10-17 15:36:26 +0200 |
| commit | c02734d6e4ceaf4cec3e5ec0aa17ca66e9bc280d (patch) | |
| tree | 6a2d533684dc65ea6fb6944586def4d94d851f51 /arch/arm64/boot/dts/renesas/r9a07g043.dtsi | |
| parent | 4a76d4ab8487aa003cc06b46fc0b0614c436be51 (diff) | |
arm64: dts: renesas: rzg2l: Drop WDT2 nodes
On members of the RZ/G2L family, WDT CH2 is specifically meant to check
the operation of the Cortex-M33 CPU. Using it from a Cortex-A55 CPU
would result in unexpected behaviour. Hence drop all WDT2 nodes and
their references from the affected SoC and SoM DTSI files.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20221009230044.10961-1-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'arch/arm64/boot/dts/renesas/r9a07g043.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/renesas/r9a07g043.dtsi | 15 |
1 files changed, 0 insertions, 15 deletions
diff --git a/arch/arm64/boot/dts/renesas/r9a07g043.dtsi b/arch/arm64/boot/dts/renesas/r9a07g043.dtsi index 689aa4ba416b..c1fb29de2fa4 100644 --- a/arch/arm64/boot/dts/renesas/r9a07g043.dtsi +++ b/arch/arm64/boot/dts/renesas/r9a07g043.dtsi @@ -820,21 +820,6 @@ status = "disabled"; }; - wdt2: watchdog@12800400 { - compatible = "renesas,r9a07g043-wdt", - "renesas,rzg2l-wdt"; - reg = <0 0x12800400 0 0x400>; - clocks = <&cpg CPG_MOD R9A07G043_WDT2_PCLK>, - <&cpg CPG_MOD R9A07G043_WDT2_CLK>; - clock-names = "pclk", "oscclk"; - interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "wdt", "perrout"; - resets = <&cpg R9A07G043_WDT2_PRESETN>; - power-domains = <&cpg>; - status = "disabled"; - }; - ostm0: timer@12801000 { compatible = "renesas,r9a07g043-ostm", "renesas,ostm"; |