diff options
author | Biju Das <biju.das.jz@bp.renesas.com> | 2023-01-21 14:58:51 +0000 |
---|---|---|
committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2023-03-06 10:48:27 +0100 |
commit | 670e2a8b9b02ff52c7ca43204459693b3c574b00 (patch) | |
tree | 549954e4ca83ef0f02849fba73e3e398ff333d4b /arch/arm64/boot/dts/renesas/r9a09g011.dtsi | |
parent | fe15c26ee26efa11741a7b632e9f23b01aca4cc6 (diff) |
arm64: dts: renesas: r9a09g011: Add USB3 DRD, device and host nodes
This patch add usb3 host and peripheral device node as child of usb3 drd
node to RZ/V2M SoC dtsi. The host/device needs to issue reset release on
DRD module before accessing host/device registers.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20230121145853.4792-11-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'arch/arm64/boot/dts/renesas/r9a09g011.dtsi')
-rw-r--r-- | arch/arm64/boot/dts/renesas/r9a09g011.dtsi | 45 |
1 files changed, 45 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/renesas/r9a09g011.dtsi b/arch/arm64/boot/dts/renesas/r9a09g011.dtsi index b5d6f7701ef1..46d67b200a66 100644 --- a/arch/arm64/boot/dts/renesas/r9a09g011.dtsi +++ b/arch/arm64/boot/dts/renesas/r9a09g011.dtsi @@ -117,6 +117,51 @@ status = "disabled"; }; + usb3drd: usb3drd@85070400 { + compatible = "renesas,r9a09g011-usb3drd", + "renesas,rzv2m-usb3drd"; + reg = <0x0 0x85070400 0x0 0x100>; + interrupts = <GIC_SPI 242 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 244 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "drd", "bc", "gpi"; + clocks = <&cpg CPG_MOD R9A09G011_USB_ACLK_P>, + <&cpg CPG_MOD R9A09G011_USB_PCLK>; + clock-names = "axi", "reg"; + resets = <&cpg R9A09G011_USB_DRD_RESET>; + power-domains = <&cpg>; + ranges; + #address-cells = <2>; + #size-cells = <2>; + status = "disabled"; + + usb3host: usb@85060000 { + compatible = "renesas,r9a09g011-xhci", + "renesas,rzv2m-xhci"; + reg = <0 0x85060000 0 0x2000>; + interrupts = <GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD R9A09G011_USB_ACLK_H>, + <&cpg CPG_MOD R9A09G011_USB_PCLK>; + clock-names = "axi", "reg"; + resets = <&cpg R9A09G011_USB_ARESETN_H>; + power-domains = <&cpg>; + status = "disabled"; + }; + + usb3peri: usb3peri@85070000 { + compatible = "renesas,r9a09g011-usb3-peri", + "renesas,rzv2m-usb3-peri"; + reg = <0x0 0x85070000 0x0 0x400>; + interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD R9A09G011_USB_ACLK_P>, + <&cpg CPG_MOD R9A09G011_USB_PCLK>; + clock-names = "axi", "reg"; + resets = <&cpg R9A09G011_USB_ARESETN_P>; + power-domains = <&cpg>; + status = "disabled"; + }; + }; + avb: ethernet@a3300000 { compatible = "renesas,etheravb-r9a09g011","renesas,etheravb-rzv2m"; reg = <0 0xa3300000 0 0x800>; |