diff options
| author | Fabrizio Castro <fabrizio.castro.jz@renesas.com> | 2022-11-03 22:39:55 +0000 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2022-11-15 09:40:10 +0100 |
| commit | 753a4ae153788225a30b0ee9dd18da83f1d94447 (patch) | |
| tree | 690b4a8f188437b3da05a656e6727ba68d893750 /arch/arm64/boot/dts/renesas/r9a09g011.dtsi | |
| parent | 872f918469a572585003128509a842f39559aef6 (diff) | |
arm64: dts: renesas: r9a09g011: Add watchdog node
The r9a09g011 (a.k.a. RZ/V2M) comes with two watchdog IPs,
but Linux is only allowed one.
Add a node for the watchdog allowed to Linux to the SoC
specific dtsi.
Signed-off-by: Fabrizio Castro <fabrizio.castro.jz@renesas.com>
Link: https://lore.kernel.org/r/20221103223956.50575-3-fabrizio.castro.jz@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'arch/arm64/boot/dts/renesas/r9a09g011.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/renesas/r9a09g011.dtsi | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/renesas/r9a09g011.dtsi b/arch/arm64/boot/dts/renesas/r9a09g011.dtsi index ebaa8cdd747d..2ccd48ee9880 100644 --- a/arch/arm64/boot/dts/renesas/r9a09g011.dtsi +++ b/arch/arm64/boot/dts/renesas/r9a09g011.dtsi @@ -161,6 +161,19 @@ status = "disabled"; }; + wdt0: watchdog@a4050000 { + compatible = "renesas,r9a09g011-wdt", + "renesas,rzv2m-wdt"; + reg = <0 0xa4050000 0 0x80>; + clocks = <&cpg CPG_MOD R9A09G011_WDT0_PCLK>, + <&cpg CPG_MOD R9A09G011_WDT0_CLK>; + clock-names = "pclk", "oscclk"; + interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>; + resets = <&cpg R9A09G011_WDT0_PRESETN>; + power-domains = <&cpg>; + status = "disabled"; + }; + pinctrl: pinctrl@b6250000 { compatible = "renesas,r9a09g011-pinctrl"; reg = <0 0xb6250000 0 0x800>; |