Merge tag 'dt-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC DT updates from Arnd Bergmann:
 "As usual, the bulk of work in the SoC tree goes into DT files, this
  time with a roughly even split between 32-bit and 64-bit SoCs rather
  than the usual mostly 64-bit changes.

  New SoCs:

   - Microchip SAMA7 SoC family based on Cortex-A7, a new 32-bit
     platform based on the older SAMA5 series.

   - Qualcomm Snapdragon SDM636 and SM8150, variations of the existing
     phone SoCs.

   - Renesas R-Car H3e-2G and M3e-2G SoCs, variations of older Renesas
     SoCs.

  New boards:

   - Marvell CN913x reference boards

   - ASpeed AST2600 BMC implementations for Facebook Cloudripper, Elbert
     and Fuji server boards.

   - Snapdragon 665 based Sony Xperia 10II

   - Snapdragon MSM8916 based Xiaomi Redmi 2

   - Snapdragon MSM8226 based Samsung Galaxy S3 Neo

   - NXP i.MX based 32-bit boards:
       - DHCOM based PicoITX
       - DHSOM based DRC0ỉ
       - SolidRun SolidSense
       - SKOV i.MX6 boards.

   - NXP i.MX based 64-bit boards:
       - Nitrogen8 SoM and MNT Reform2
       - LS1088A based Traverse Ten64
       - i.MX8M based GW7902.

   - NVIDIA Jetson TX2 NX Developer Kit

   - 4KOpen STiH418-b2264 development board

   - ux500 based Samsung phones: Gavini, Codina and Kyle

   - TI AM335x based Sancloud BBE Lite

   - ixp4xx dts files to replace all old board files

  Other changes:

   - Treewide fixes for dtc warnings

   - Rockchips i/o domain support

   - TI OMAP/AM3 CPSW switch driver support

   - Improved device support for allwinner, aspeed, qualcomm, NXP,
     nvidia, Renesas, Samsung, Amlogic, Mediatek, ixp4xx, stm32, sti,
     OMAP and actions"

* tag 'dt-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (412 commits)
  arm/arm64: dts: Fix remaining dtc 'unit_address_format' warnings
  ARM: dts: rockchip: Add SFC to RV1108
  arm64: dts: marvell: armada-37xx: Extend PCIe MEM space
  ARM: dts: aspeed: p10bmc: Add power control pins
  ARM: dts: aspeed: cloudripper: Add comments for "mdio1"
  ARM: dts: aspeed: minipack: Update flash partition table
  dt-bindings: arm: fsl: Add Traverse Ten64 (LS1088A) board
  dt-bindings: vendor-prefixes: add Traverse Technologies
  arm64: dts: add device tree for Traverse Ten64 (LS1088A)
  arm64: dts: ls1088a: add missing PMU node
  arm64: dts: ls1088a: add internal PCS for DPMAC1 node
  ARM: dts: imx6qp-prtwd3: configure ENET_REF clock to 125MHz
  ARM: dts: vf610-zii-dev-rev-b: Remove #address-cells and #size-cells property from at93c46d dt node
  ARM: dts: add SKOV imx6q and imx6dl based boards
  dt-bindings: arm: fsl: add SKOV imx6q and imx6dl based boards
  dt-bindings: vendor-prefixes: Add an entry for SKOV A/S
  arm64: dts: imx8mq-reform2: add sound support
  arm64: dts: imx8m: drop interrupt-affinity for pmu
  arm64: dts: imx8qxp: update pmu compatible
  arm64: dts: imx8mm: update pmu compatible
  ...

1 files changed, 56 insertions, 0 deletions

diff --git a/arch/arm64/boot/dts/renesas/salvator-xs.dtsi b/arch/arm64/boot/dts/renesas/salvator-xs.dtsi
index 717d42758cbc..08b925624e12 100644
--- a/arch/arm64/boot/dts/renesas/salvator-xs.dtsi
+++ b/arch/arm64/boot/dts/renesas/salvator-xs.dtsi
@@ -27,3 +27,59 @@
 		clock-names = "xin";
 	};
 };
+
+#ifdef SOC_HAS_SATA
+&pca9654 {
+	pcie-sata-switch-hog {
+		gpio-hog;
+		gpios = <7 GPIO_ACTIVE_HIGH>;
+		output-low; /* enable SATA by default */
+		line-name = "PCIE/SATA switch";
+	};
+};
+
+/* SW12-7 must be set 'Off' (MD12 set to 1) which is not the default! */
+#endif /* SOC_HAS_SATA */
+
+#ifdef SOC_HAS_USB2_CH3
+&ehci3 {
+	dr_mode = "otg";
+	status = "okay";
+};
+
+&hsusb3 {
+	dr_mode = "otg";
+	status = "okay";
+};
+
+&ohci3 {
+	dr_mode = "otg";
+	status = "okay";
+};
+
+&pfc {
+	/*
+	 * - On Salvator-X[S], GP6_3[01] are connected to ADV7482 as irq pins
+	 *   (when SW31 is the default setting on Salvator-XS).
+	 * - If SW31 is the default setting, you cannot use USB2.0 ch3 on
+	 *   r8a77951 with Salvator-XS.
+	 *   Hence the SW31 setting must be changed like 2) below.
+	 *   1) Default setting of SW31: ON-ON-OFF-OFF-OFF-OFF:
+	 *	- Connect GP6_3[01] to ADV7842.
+	 *   2) Changed setting of SW31: OFF-OFF-ON-ON-ON-ON:
+	 *	- Connect GP6_3[01] to BD082065 (USB2.0 ch3's host power).
+	 *	- Connect GP6_{04,21} to ADV7842.
+	 */
+	usb2_ch3_pins: usb2_ch3 {
+		groups = "usb2_ch3";
+		function = "usb2_ch3";
+	};
+};
+
+&usb2_phy3 {
+	pinctrl-0 = <&usb2_ch3_pins>;
+	pinctrl-names = "default";
+
+	status = "okay";
+};
+#endif /* SOC_HAS_USB2_CH3 */