Merge tag 'renesas-arm64-dt2-for-v4.15' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt

Pull "Second Round of Renesas ARM64 Based SoC DT Updates for v4.15" from Simon Horman:

* r8a7795 (H3) and r8a7796 (M3-W) SoCs
  - Use R-Car Gen 3 fallback compat string for GPIO

    Simon Horman says "Use newly added R-Car GPIO Gen 1, 2 and 3 fallback
    compat strings in peace of now deprecated non-generation specific R-Car
    GPIO fallback compat string in the DT of Renesas ARM and arm64 based
    SoCs.

* r8a7795 (H3) and r8a7796 (M3-W) Salvator boards
  - Add dr_mode property for USB2.0 channel 0

    Shimoda-san says "Since Salvator-X[S] have a USB2.0 dual-role channel
    (CN9), this patch
    adds dr_mode property for USB2.0 channel 0 (EHCI/OHCI and HS-USB)
    as "otg".

    Using dual-role channel (or not) is related to the type of USB receptor
    on board specification. So, I added the property into the
    salvator-common.dtsi."

  - Add pfc node for USB3.0 channel 0

    Shimoda-san says "Since a R-Car Gen3 bootloader enables the PFC of
    USB3.0 channel 0, the USB3.0 host controller works without this setting
    on the kernel.  But, this setting should have salvator-common.dtsi. So,
    this patch adds the pfc node for USB3.0 channel 0."

* r8a7795 (H3) and r8a7796 (M3-W) Salvator and ULCB boards
  - Correct audio_clkout

    Morimoto-san says ""audio_clkout" is dummy clock of <&rcar_sound 0> to
    avoid clock loop which invites probe conflct. Thus <&rcar_sound 0> and
    "audio_clkout" should be same value."

* r8a7795 (H3) and r8a7796 (M3-W) Salvator and ULCB, and
  r8a77995 (D3) Draak boards
  - Drop "avb_phy_int" from avb_pins

    Shimoda-san says "Since the Ethernet AVB driver doesn't support
    AVB_PHY_INT handling and it will be handled by a phy driver as a gpio
    pin, this patch removes the "avb_phy_int" from the avb_pins node."

* r8a77995 (D3) Draak board
  - Enable PWM channels

    Shimoda-san says "Each channel connects to LTC2644 for brightness
    control."

* r8a77970 (V3M) Eagle and ULCB Kingfisher boards
  - Add initial device tree support

* tag 'renesas-arm64-dt2-for-v4.15' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (31 commits)
  arm64: dts: renesas: salvator-common: add dr_mode property for USB2.0 channel 0
  arm64: dts: r8a7796: Use R-Car GPIO Gen3 fallback compat string
  arm64: dts: r8a7795: Use R-Car GPIO Gen3 fallback compat string
  arm64: renesas: ulcb: fixup audio_clkout
  arm64: renesas: salvator-common: fixup audio_clkout
  arm64: dts: renesas: eagle: add EtherAVB support
  arm64: dts: r8a77995: Add INTC-EX device node
  arm64: dts: r8a77970: Add INTC-EX device node
  arm64: dts: r8a7796: Add INTC-EX device node
  arm64: dts: ulcb-kf: hog USB3 hub control gpios
  arm64: dts: ulcb-kf: enable PCA9548 on I2C4
  arm64: dts: ulcb-kf: enable PCA9548 on I2C2
  arm64: dts: ulcb-kf: enable TCA9539 on I2C4
  arm64: dts: ulcb-kf: enable TCA9539 on I2C2
  arm64: dts: ulcb-kf: enable USB3.0 Host
  arm64: dts: ulcb-kf: enable PCIE0/1
  arm64: dts: ulcb-kf: enable USB2.0 Host channel 0
  arm64: dts: ulcb-kf: enable HSUSB
  arm64: dts: ulcb-kf: enable CAN0/1
  arm64: dts: ulcb-kf: enable SCIF1
  ...

1 files changed, 169 insertions, 0 deletions

diff --git a/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi b/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi
new file mode 100644
index 000000000000..657ad1041965
--- /dev/null
+++ b/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi
@@ -0,0 +1,169 @@
+/*
+ * Device Tree Source for the Kingfisher (ULCB extension) board
+ *
+ * Copyright (C) 2017 Renesas Electronics Corp.
+ * Copyright (C) 2017 Cogent Embedded, Inc.
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2.  This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+
+/ {
+	aliases {
+		serial1 = &hscif0;
+		serial2 = &scif1;
+	};
+};
+
+&can0 {
+	pinctrl-0 = <&can0_pins>;
+	pinctrl-names = "default";
+	status = "okay";
+};
+
+&can1 {
+	pinctrl-0 = <&can1_pins>;
+	pinctrl-names = "default";
+	status = "okay";
+};
+
+&ehci0 {
+	status = "okay";
+};
+
+&hscif0 {
+	pinctrl-0 = <&hscif0_pins>;
+	pinctrl-names = "default";
+	uart-has-rtscts;
+
+	status = "okay";
+};
+
+&hsusb {
+	status = "okay";
+};
+
+&i2c2 {
+	gpio_exp_74: gpio@74 {
+		compatible = "ti,tca9539";
+		reg = <0x74>;
+		gpio-controller;
+		#gpio-cells = <2>;
+		interrupt-controller;
+		interrupt-parent = <&gpio6>;
+		interrupts = <8 IRQ_TYPE_EDGE_FALLING>;
+
+		hub_pwen {
+			gpio-hog;
+			gpios = <6 GPIO_ACTIVE_HIGH>;
+			output-high;
+			line-name = "HUB pwen";
+		};
+
+		hub_rst {
+			gpio-hog;
+			gpios = <7 GPIO_ACTIVE_HIGH>;
+			output-high;
+			line-name = "HUB rst";
+		};
+	};
+
+	gpio_exp_75: gpio@75 {
+		compatible = "ti,tca9539";
+		reg = <0x75>;
+		gpio-controller;
+		#gpio-cells = <2>;
+		interrupt-controller;
+		interrupt-parent = <&gpio6>;
+		interrupts = <4 IRQ_TYPE_EDGE_FALLING>;
+	};
+
+	i2cswitch2: i2c-switch@71 {
+		compatible = "nxp,pca9548";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		reg = <0x71>;
+		reset-gpios = <&gpio5 3 GPIO_ACTIVE_LOW>;
+	};
+};
+
+&i2c4 {
+	gpio_exp_76: gpio@76 {
+		compatible = "ti,tca9539";
+		reg = <0x76>;
+		gpio-controller;
+		#gpio-cells = <2>;
+		interrupt-controller;
+		interrupt-parent = <&gpio7>;
+		interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
+	};
+
+	gpio_exp_77: gpio@77 {
+		compatible = "ti,tca9539";
+		reg = <0x77>;
+		gpio-controller;
+		#gpio-cells = <2>;
+		interrupt-controller;
+		interrupt-parent = <&gpio5>;
+		interrupts = <9 IRQ_TYPE_EDGE_FALLING>;
+	};
+
+	i2cswitch4: i2c-switch@71 {
+		compatible = "nxp,pca9548";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		reg = <0x71>;
+		reset-gpios= <&gpio3 15 GPIO_ACTIVE_LOW>;
+	};
+};
+
+&ohci0 {
+	status = "okay";
+};
+
+&pcie_bus_clk {
+	clock-frequency = <100000000>;
+};
+
+&pciec0 {
+	status = "okay";
+};
+
+&pciec1 {
+	status = "okay";
+};
+
+&pfc {
+	can0_pins: can0 {
+		groups = "can0_data_a";
+		function = "can0";
+	};
+
+	can1_pins: can1 {
+		groups = "can1_data";
+		function = "can1";
+	};
+
+	hscif0_pins: hscif0 {
+		groups = "hscif0_data", "hscif0_ctrl";
+		function = "hscif0";
+	};
+
+	scif1_pins: scif1 {
+		groups = "scif1_data_b", "scif1_ctrl";
+		function = "scif1";
+	};
+};
+
+&scif1 {
+	pinctrl-0 = <&scif1_pins>;
+	pinctrl-names = "default";
+	uart-has-rtscts;
+
+	status = "okay";
+};
+
+&xhci0 {
+	status = "okay";
+};