diff options
| author | Geert Uytterhoeven <geert+renesas@glider.be> | 2023-01-31 12:32:33 +0100 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2023-03-06 10:48:27 +0100 |
| commit | 10fb3e2746eee0bf278c797a86fedc665bbb0ad2 (patch) | |
| tree | 4ffb9bccf72c2be68a6206a70577ef2e6614cd43 /arch/arm64/boot/dts/renesas | |
| parent | b6c0be722b0c0a7204b6289464a04cd7b4fdfca0 (diff) | |
arm64: dts: renesas: falcon: Describe CAN clock
Describe the 40 MHz Crystal Clock Oscillator providing CAN_CLK.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/0bf36a1708ad87c00455b96ebaacc63fb7305b7a.1675164686.git.geert+renesas@glider.be
Diffstat (limited to 'arch/arm64/boot/dts/renesas')
| -rw-r--r-- | arch/arm64/boot/dts/renesas/r8a779a0-falcon.dts | 11 |
1 files changed, 10 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/renesas/r8a779a0-falcon.dts b/arch/arm64/boot/dts/renesas/r8a779a0-falcon.dts index b2e67b82caf6..63db822e5f46 100644 --- a/arch/arm64/boot/dts/renesas/r8a779a0-falcon.dts +++ b/arch/arm64/boot/dts/renesas/r8a779a0-falcon.dts @@ -37,8 +37,12 @@ }; }; +&can_clk { + clock-frequency = <40000000>; +}; + &canfd { - pinctrl-0 = <&canfd0_pins>, <&canfd1_pins>; + pinctrl-0 = <&canfd0_pins>, <&canfd1_pins>, <&can_clk_pins>; pinctrl-names = "default"; status = "okay"; @@ -80,6 +84,11 @@ }; + can_clk_pins: can-clk { + groups = "can_clk"; + function = "can_clk"; + }; + canfd0_pins: canfd0 { groups = "canfd0_data"; function = "canfd0"; |