diff options
| author | Geert Uytterhoeven <geert+renesas@glider.be> | 2022-03-29 14:20:03 +0200 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2022-04-13 13:53:42 +0200 |
| commit | 5f300a7f3953aea5b2ce996a0bdec31ffd108999 (patch) | |
| tree | 4d17d5fd5636d08cfae399116b2a4d03ce9e6335 /arch/arm64/boot/dts/renesas | |
| parent | a1de91f0ac71cfd3ff3dd630ab560238db05bef6 (diff) | |
arm64: dts: renesas: ebisu: Add RPC HyperFlash device node
Add the RPC HyperFlash device node along with its partitions to the
common Ebisu board DTS file.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/b14c769f62211b67d90dbd2f127357756e6cb4fa.1648548339.git.geert+renesas@glider.be
Diffstat (limited to 'arch/arm64/boot/dts/renesas')
| -rw-r--r-- | arch/arm64/boot/dts/renesas/ebisu.dtsi | 58 |
1 files changed, 58 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/renesas/ebisu.dtsi b/arch/arm64/boot/dts/renesas/ebisu.dtsi index 67231c8576c5..ae688707f8c6 100644 --- a/arch/arm64/boot/dts/renesas/ebisu.dtsi +++ b/arch/arm64/boot/dts/renesas/ebisu.dtsi @@ -600,6 +600,12 @@ function = "pwm5"; }; + rpc_pins: rpc { + groups = "rpc_clk2", "rpc_ctrl", "rpc_data", "rpc_reset", + "rpc_int"; + function = "rpc"; + }; + scif2_pins: scif2 { groups = "scif2_data_a"; function = "scif2"; @@ -711,6 +717,58 @@ }; +&rpc { + pinctrl-0 = <&rpc_pins>; + pinctrl-names = "default"; + + /* Left disabled. To be enabled by firmware when unlocked. */ + + flash@0 { + compatible = "cypress,hyperflash", "cfi-flash"; + reg = <0>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + bootparam@0 { + reg = <0x00000000 0x040000>; + read-only; + }; + bl2@40000 { + reg = <0x00040000 0x140000>; + read-only; + }; + cert_header_sa6@180000 { + reg = <0x00180000 0x040000>; + read-only; + }; + bl31@1c0000 { + reg = <0x001c0000 0x040000>; + read-only; + }; + tee@200000 { + reg = <0x00200000 0x440000>; + read-only; + }; + uboot@640000 { + reg = <0x00640000 0x100000>; + read-only; + }; + dtb@740000 { + reg = <0x00740000 0x080000>; + }; + kernel@7c0000 { + reg = <0x007c0000 0x1400000>; + }; + user@1bc0000 { + reg = <0x01bc0000 0x2440000>; + }; + }; + }; +}; + &rwdt { timeout-sec = <60>; status = "okay"; |