diff options
| author | Vladimir Barinov <vladimir.barinov+renesas@cogentembedded.com> | 2017-07-07 05:37:14 +0300 |
|---|---|---|
| committer | Simon Horman <horms+renesas@verge.net.au> | 2017-07-27 15:59:45 +0200 |
| commit | 6d81daf306e3f6e95a1125d2c981071b90b423ad (patch) | |
| tree | b27cd00e82cff5765360773ab48db2af7ac15259 /arch/arm64/boot/dts/renesas | |
| parent | 8cb6898c3e3a20b0ad17513ad5b7774dc0652876 (diff) | |
arm64: dts: r8a7795: h3ulcb: Add DU external dot clocks
The DU0/DU1/DU2/DU3 external dot clocks are provided by the programmable
Versaclock5 clock generator.
Signed-off-by: Vladimir Barinov <vladimir.barinov+renesas@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'arch/arm64/boot/dts/renesas')
| -rw-r--r-- | arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts index 27d4b1a4c475..0afe777973de 100644 --- a/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts +++ b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts @@ -38,3 +38,17 @@ reg = <0x7 0x00000000 0x0 0x40000000>; }; }; + +&du { + clocks = <&cpg CPG_MOD 724>, + <&cpg CPG_MOD 723>, + <&cpg CPG_MOD 722>, + <&cpg CPG_MOD 721>, + <&cpg CPG_MOD 727>, + <&versaclock5 1>, + <&versaclock5 3>, + <&versaclock5 4>, + <&versaclock5 2>; + clock-names = "du.0", "du.1", "du.2", "du.3", "lvds.0", + "dclkin.0", "dclkin.1", "dclkin.2", "dclkin.3"; +}; |