summaryrefslogtreecommitdiff
path: root/arch/arm64/boot/dts/renesas
diff options
context:
space:
mode:
authorVladimir Barinov <vladimir.barinov+renesas@cogentembedded.com>2017-07-07 05:37:26 +0300
committerSimon Horman <horms+renesas@verge.net.au>2017-07-27 15:59:54 +0200
commitd6e381673d8762223816f81632cd1d0b6597f4c0 (patch)
tree6e543f00c91588b2ee13b049e5e775bbcba94348 /arch/arm64/boot/dts/renesas
parent6d81daf306e3f6e95a1125d2c981071b90b423ad (diff)
arm64: dts: r8a7796: m3ulcb: Add DU external dot clocks
The DU0/DU1/DU2 external dot clocks are provided by the programmable Versaclock5 clock generator. Signed-off-by: Vladimir Barinov <vladimir.barinov+renesas@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'arch/arm64/boot/dts/renesas')
-rw-r--r--arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts12
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts b/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts
index 1ff9dffae461..daee1f1a3f68 100644
--- a/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts
+++ b/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts
@@ -28,3 +28,15 @@
reg = <0x6 0x00000000 0x0 0x40000000>;
};
};
+
+&du {
+ clocks = <&cpg CPG_MOD 724>,
+ <&cpg CPG_MOD 723>,
+ <&cpg CPG_MOD 722>,
+ <&cpg CPG_MOD 727>,
+ <&versaclock5 1>,
+ <&versaclock5 3>,
+ <&versaclock5 2>;
+ clock-names = "du.0", "du.1", "du.2", "lvds.0",
+ "dclkin.0", "dclkin.1", "dclkin.2";
+};