diff options
| author | Robin Murphy <robin.murphy@arm.com> | 2021-01-20 23:42:21 +0000 |
|---|---|---|
| committer | Heiko Stuebner <heiko@sntech.de> | 2021-02-01 19:00:31 +0100 |
| commit | 9e8244495f442bb951a354c4d240a97f423e3f14 (patch) | |
| tree | 02cb04fae175dc5875681507d927951602eb10ad /arch/arm64/boot/dts/rockchip/rk3308.dtsi | |
| parent | 833821eeab916631d0cd22dbcda8db4b2a3acc3d (diff) | |
arm64: dts: rockchip: Remove bogus "amba" bus nodes
The "amba" bus nodes wrapping all the DMA-330 nodes serve no useful
purpose, and certainly bear no relation at all to the actual underlying
interconnect topology. They appear to be cargo-cult copying from a
design misstep in the very early days of FDT adoption on ARM, which was
righted with the "arm,primecell" compatible, and the last trace of the
idea finally purged by commit 2ef7d5f342c1 ("ARM, ARM64: dts: drop
"arm,amba-bus" in favor of "simple-bus"").
As such, they can simply be removed and the DMA-330 nodes fitted into
the normal sort order.
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Link: https://lore.kernel.org/r/131e0ea065109760ea3b59c4bb90cf4fac7826f7.1611186142.git.robin.murphy@arm.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'arch/arm64/boot/dts/rockchip/rk3308.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/rockchip/rk3308.dtsi | 45 |
1 files changed, 19 insertions, 26 deletions
diff --git a/arch/arm64/boot/dts/rockchip/rk3308.dtsi b/arch/arm64/boot/dts/rockchip/rk3308.dtsi index 7211fab7a6e4..4ea32e8f33d2 100644 --- a/arch/arm64/boot/dts/rockchip/rk3308.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3308.dtsi @@ -513,33 +513,26 @@ status = "disabled"; }; - amba: bus { - compatible = "simple-bus"; - #address-cells = <2>; - #size-cells = <2>; - ranges; + dmac0: dma-controller@ff2c0000 { + compatible = "arm,pl330", "arm,primecell"; + reg = <0x0 0xff2c0000 0x0 0x4000>; + interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>; + arm,pl330-periph-burst; + clocks = <&cru ACLK_DMAC0>; + clock-names = "apb_pclk"; + #dma-cells = <1>; + }; - dmac0: dma-controller@ff2c0000 { - compatible = "arm,pl330", "arm,primecell"; - reg = <0x0 0xff2c0000 0x0 0x4000>; - interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>; - arm,pl330-periph-burst; - clocks = <&cru ACLK_DMAC0>; - clock-names = "apb_pclk"; - #dma-cells = <1>; - }; - - dmac1: dma-controller@ff2d0000 { - compatible = "arm,pl330", "arm,primecell"; - reg = <0x0 0xff2d0000 0x0 0x4000>; - interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>; - arm,pl330-periph-burst; - clocks = <&cru ACLK_DMAC1>; - clock-names = "apb_pclk"; - #dma-cells = <1>; - }; + dmac1: dma-controller@ff2d0000 { + compatible = "arm,pl330", "arm,primecell"; + reg = <0x0 0xff2d0000 0x0 0x4000>; + interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>; + arm,pl330-periph-burst; + clocks = <&cru ACLK_DMAC1>; + clock-names = "apb_pclk"; + #dma-cells = <1>; }; i2s_2ch_0: i2s@ff350000 { |