diff options
| author | Lin Huang <hl@rock-chips.com> | 2022-03-08 11:08:58 -0800 |
|---|---|---|
| committer | Heiko Stuebner <heiko@sntech.de> | 2022-04-10 19:10:09 +0200 |
| commit | 80bc6f34c559c97069b75d6eb453d4218c3ed017 (patch) | |
| tree | 214c319893964923a5cc9eb9506537f586ac5598 /arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi | |
| parent | 1b3f36854ab74839693582bc957930f4416ce8ff (diff) | |
arm64: dts: rockchip: Enable dmc and dfi nodes on gru
Enable the DMC (Dynamic Memory Controller) and the DFI (DDR PHY
Interface) nodes on gru boards so we can support DDR DVFS.
Signed-off-by: Lin Huang <hl@rock-chips.com>
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Signed-off-by: Gaël PORTAY <gael.portay@collabora.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Brian Norris <briannorris@chromium.org>
Link: https://lore.kernel.org/r/20220308110825.v4.12.I3a5c7f21ecd8221b42c2dbcd618386bce7b3e9a6@changeid
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi | 28 |
1 files changed, 28 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi index 162f08bca0d4..23bfba86daab 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi @@ -373,6 +373,34 @@ <200000000>; }; +&dfi { + status = "okay"; +}; + +&dmc { + status = "okay"; + + rockchip,pd-idle-ns = <160>; + rockchip,sr-idle-ns = <10240>; + rockchip,sr-mc-gate-idle-ns = <40960>; + rockchip,srpd-lite-idle-ns = <61440>; + rockchip,standby-idle-ns = <81920>; + + rockchip,ddr3_odt_dis_freq = <666000000>; + rockchip,lpddr3_odt_dis_freq = <666000000>; + rockchip,lpddr4_odt_dis_freq = <666000000>; + + rockchip,sr-mc-gate-idle-dis-freq-hz = <1000000000>; + rockchip,srpd-lite-idle-dis-freq-hz = <0>; + rockchip,standby-idle-dis-freq-hz = <928000000>; +}; + +&dmc_opp_table { + opp03 { + opp-suspend; + }; +}; + &emmc_phy { status = "okay"; }; |