diff options
author | Katsuhiro Suzuki <katsuhiro@katsuster.net> | 2019-12-02 14:59:29 +0900 |
---|---|---|
committer | Heiko Stuebner <heiko@sntech.de> | 2019-12-16 10:56:26 +0100 |
commit | c2753d15d2b33f980ef4dbb657373a3f327533eb (patch) | |
tree | edfe25937b266323be8920576444d31a504fc95d /arch/arm64/boot/dts/rockchip/rk3399-rockpro64-v2.dts | |
parent | 0c556dea089dd133c70b72edae2f429ebe7e652f (diff) |
arm64: dts: rockchip: split rk3399-rockpro64 for v2 and v2.1 boards
This patch splits rk3399-rockpro64 dts file to 2 files for v2 and
v2.1 boards.
Both v2 and v2.1 boards can use almost same settings but we find a
difference in I2C address of audio CODEC ES8136.
Reported-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Katsuhiro Suzuki <katsuhiro@katsuster.net>
Link: https://lore.kernel.org/r/20191202055929.26540-1-katsuhiro@katsuster.net
[put pine64,rockpro64-v2.* into an enum]
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'arch/arm64/boot/dts/rockchip/rk3399-rockpro64-v2.dts')
-rw-r--r-- | arch/arm64/boot/dts/rockchip/rk3399-rockpro64-v2.dts | 30 |
1 files changed, 30 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rockpro64-v2.dts b/arch/arm64/boot/dts/rockchip/rk3399-rockpro64-v2.dts new file mode 100644 index 000000000000..304e3c51391c --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3399-rockpro64-v2.dts @@ -0,0 +1,30 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd. + * Copyright (c) 2018 Akash Gajjar <Akash_Gajjar@mentor.com> + * Copyright (c) 2019 Katsuhiro Suzuki <katsuhiro@katsuster.net> + */ + +/dts-v1/; +#include "rk3399-rockpro64.dtsi" + +/ { + model = "Pine64 RockPro64 v2.0"; + compatible = "pine64,rockpro64-v2.0", "pine64,rockpro64", "rockchip,rk3399"; +}; + +&i2c1 { + es8316: codec@10 { + compatible = "everest,es8316"; + reg = <0x10>; + clocks = <&cru SCLK_I2S_8CH_OUT>; + clock-names = "mclk"; + #sound-dai-cells = <0>; + + port { + es8316_p0_0: endpoint { + remote-endpoint = <&i2s1_p0_0>; + }; + }; + }; +}; |