diff options
| author | Peter Geis <pgwipeout@gmail.com> | 2021-07-10 11:10:33 -0400 |
|---|---|---|
| committer | Heiko Stuebner <heiko@sntech.de> | 2021-09-15 17:50:24 +0200 |
| commit | 016c0e8a7a6e7820fb54d8ff8a4a2928a3016421 (patch) | |
| tree | 6249185f24ce08f5db81f865a1941bff179e1bd1 /arch/arm64/boot/dts/rockchip/rk3566.dtsi | |
| parent | 5067f459e5ee22857eeb4f659219db8e28c6263e (diff) | |
arm64: dts: rockchip: add rk3566 dtsi
Add the rk3566 dtsi which includes the soc specific changes for this
chip.
Signed-off-by: Peter Geis <pgwipeout@gmail.com>
Link: https://lore.kernel.org/r/20210710151034.32857-4-pgwipeout@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'arch/arm64/boot/dts/rockchip/rk3566.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/rockchip/rk3566.dtsi | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/rockchip/rk3566.dtsi b/arch/arm64/boot/dts/rockchip/rk3566.dtsi new file mode 100644 index 000000000000..3839eef5e4f7 --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3566.dtsi @@ -0,0 +1,20 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) + +#include "rk356x.dtsi" + +/ { + compatible = "rockchip,rk3566"; +}; + +&power { + power-domain@RK3568_PD_PIPE { + reg = <RK3568_PD_PIPE>; + clocks = <&cru PCLK_PIPE>; + pm_qos = <&qos_pcie2x1>, + <&qos_sata1>, + <&qos_sata2>, + <&qos_usb3_0>, + <&qos_usb3_1>; + #power-domain-cells = <0>; + }; +}; |