summaryrefslogtreecommitdiff
path: root/arch/arm64/boot/dts/rockchip/rk356x.dtsi
diff options
context:
space:
mode:
authorPeter Geis <pgwipeout@gmail.com>2022-04-29 07:52:49 -0400
committerHeiko Stuebner <heiko@sntech.de>2022-04-30 15:22:34 +0200
commit13e0ee34f39c01948a7bbaab0b3c225d9b00a5bb (patch)
treea3c80eb685b09ec06fdfdc54d4efba806710da8d /arch/arm64/boot/dts/rockchip/rk356x.dtsi
parent87a267b4af09477721e9d2bad63555f0dc49d08a (diff)
arm64: dts: rockchip: add rk356x sfc support
Add the sfc node to the rk356x device tree. This enables spi flash support for this soc. Signed-off-by: Peter Geis <pgwipeout@gmail.com> Link: https://lore.kernel.org/r/20220429115252.2360496-5-pgwipeout@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'arch/arm64/boot/dts/rockchip/rk356x.dtsi')
-rw-r--r--arch/arm64/boot/dts/rockchip/rk356x.dtsi11
1 files changed, 11 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
index 55e6dcb948cc..3f0e11af738d 100644
--- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
@@ -778,6 +778,17 @@
status = "disabled";
};
+ sfc: spi@fe300000 {
+ compatible = "rockchip,sfc";
+ reg = <0x0 0xfe300000 0x0 0x4000>;
+ interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru SCLK_SFC>, <&cru HCLK_SFC>;
+ clock-names = "clk_sfc", "hclk_sfc";
+ pinctrl-0 = <&fspi_pins>;
+ pinctrl-names = "default";
+ status = "disabled";
+ };
+
sdhci: mmc@fe310000 {
compatible = "rockchip,rk3568-dwcmshc";
reg = <0x0 0xfe310000 0x0 0x10000>;