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authorArnd Bergmann <arnd@arndb.de>2020-07-23 14:02:53 +0200
committerArnd Bergmann <arnd@arndb.de>2020-07-23 14:02:54 +0200
commit3ed75c545d472274ae0aab5a7fd39e15828c2b62 (patch)
treef9edb9dfcbba2c951e5e82f127d818d3c590c1eb /arch/arm64/boot/dts/rockchip
parent571a9cf12a8557ad01d822929e74fd44300d9b2d (diff)
parent93ca8ac2e8fcea6feb02a40edd2334144b62fc6e (diff)
Merge tag 'v5.9-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/dt
Biggest part is the addition of the rk3288 variant of the VMARC SOM and it's Rock Pi N8 icarnation. This brings some arm64 dts-changes with it as the underlying Dalang carrier board is shared by both an arm32 rk3288 SOM and an arm64 rk3399 SOM (Rock Pi N10). Other than that rk3288 gets its ohci node added that only works on the fixed rk3288w variant of the soc and some asorted fixes and improvements for dt-binding-check. * tag 'v5.9-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: arm64: dts: rockchip: Add PCIe for RockPI N10 ARM: dts: rockchip: Add HDMI out for RockPI N8/N10 ARM: dts: rockchip: Add USB for RockPI N8/N10 ARM: dts: rockchip: Add usb host0 ohci node for rk3288 ARM: dts: rockchip: Fix VBUS on rk3288-vyasa ARM: dts: rockchip: Add Radxa Rock Pi N8 initial support ARM: dts: rockchip: Add VMARC RK3288 SOM initial support dt-bindings: arm: rockchip: Add Rock Pi N8 binding arm64: dts: rk3399pro: vmarc-som: Move common properties into Carrier arm64: dts: rk3399pro: vmarc-som: Move supply regulators into Carrier arm64: dts: rk3399pro: vmarc-som: Fix sorting nodes, properties ARM: dts: rockchip: dalang-carrier: Move i2c nodes into SOM ARM: dts: rockchip: Add 'arm,pl330-periph-burst' for dmac ARM: dts: rockchip: Add marvell BT irq config ARM: dts: rockchip: rename label and nodename pinctrl subnodes that end with gpio Link: https://lore.kernel.org/r/2472314.kD9Egx1jfM@phil Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm64/boot/dts/rockchip')
-rw-r--r--arch/arm64/boot/dts/rockchip/rk3399pro-rock-pi-n10.dts6
-rw-r--r--arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi206
2 files changed, 170 insertions, 42 deletions
diff --git a/arch/arm64/boot/dts/rockchip/rk3399pro-rock-pi-n10.dts b/arch/arm64/boot/dts/rockchip/rk3399pro-rock-pi-n10.dts
index a1783e7f769a..369de5dc0ebd 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399pro-rock-pi-n10.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399pro-rock-pi-n10.dts
@@ -8,11 +8,15 @@
/dts-v1/;
#include "rk3399.dtsi"
#include "rk3399-opp.dtsi"
-#include "rk3399pro-vmarc-som.dtsi"
#include <arm/rockchip-radxa-dalang-carrier.dtsi>
+#include "rk3399pro-vmarc-som.dtsi"
/ {
model = "Radxa ROCK Pi N10";
compatible = "radxa,rockpi-n10", "vamrs,rk3399pro-vmarc-som",
"rockchip,rk3399pro";
+
+ chosen {
+ stdout-path = "serial2:1500000n8";
+ };
};
diff --git a/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi b/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi
index 0a516334f15f..5d087be04af8 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi
@@ -12,30 +12,16 @@
/ {
compatible = "vamrs,rk3399pro-vmarc-som", "rockchip,rk3399pro";
- clkin_gmac: external-gmac-clock {
- compatible = "fixed-clock";
- clock-frequency = <125000000>;
- clock-output-names = "clkin_gmac";
- #clock-cells = <0>;
- };
-
- vcc12v_dcin: vcc12v-dcin-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc12v_dcin";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <12000000>;
- regulator-max-microvolt = <12000000>;
- };
-
- vcc5v0_sys: vcc5v0-sys-regulator {
+ vcc3v3_pcie: vcc-pcie-regulator {
compatible = "regulator-fixed";
- regulator-name = "vcc5v0_sys";
+ enable-active-high;
+ gpio = <&gpio4 RK_PD4 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pcie_pwr>;
+ regulator-name = "vcc3v3_pcie";
regulator-always-on;
regulator-boot-on;
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&vcc12v_dcin>;
+ vin-supply = <&vcc5v0_sys>;
};
};
@@ -61,23 +47,20 @@
&gmac {
assigned-clocks = <&cru SCLK_RMII_SRC>;
- assigned-clock-parents = <&clkin_gmac>;
- clock_in_out = "input";
phy-supply = <&vcc_lan>;
- phy-mode = "rgmii";
- pinctrl-names = "default";
- pinctrl-0 = <&rgmii_pins>;
snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
- snps,reset-active-low;
- snps,reset-delays-us = <0 10000 50000>;
- tx_delay = <0x28>;
- rx_delay = <0x11>;
+};
+
+&hdmi {
+ ddc-i2c-bus = <&i2c3>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&hdmi_cec>;
};
&i2c0 {
clock-frequency = <400000>;
- i2c-scl-rising-time-ns = <180>;
i2c-scl-falling-time-ns = <30>;
+ i2c-scl-rising-time-ns = <180>;
status = "okay";
rk809: pmic@20 {
@@ -171,7 +154,8 @@
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <900000>;
regulator-state-mem {
- regulator-off-in-suspend;
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <900000>;
};
};
@@ -206,7 +190,8 @@
regulator-min-microvolt = <1850000>;
regulator-max-microvolt = <1850000>;
regulator-state-mem {
- regulator-off-in-suspend;
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1850000>;
};
};
@@ -297,11 +282,88 @@
};
};
+&i2c1 {
+ i2c-scl-falling-time-ns = <30>;
+ i2c-scl-rising-time-ns = <140>;
+ status = "okay";
+};
+
+&i2c2 {
+ clock-frequency = <400000>;
+ status = "okay";
+
+ hym8563: hym8563@51 {
+ compatible = "haoyu,hym8563";
+ reg = <0x51>;
+ #clock-cells = <0>;
+ clock-frequency = <32768>;
+ clock-output-names = "hym8563";
+ pinctrl-names = "default";
+ pinctrl-0 = <&hym8563_int>;
+ interrupt-parent = <&gpio4>;
+ interrupts = <RK_PD6 IRQ_TYPE_LEVEL_LOW>;
+ };
+};
+
+&i2c3 {
+ i2c-scl-rising-time-ns = <450>;
+ i2c-scl-falling-time-ns = <15>;
+ status = "okay";
+};
+
&io_domains {
status = "okay";
bt656-supply = <&vcca_1v8>;
- sdmmc-supply = <&vccio_sd>;
gpio1830-supply = <&vccio_3v0>;
+ sdmmc-supply = <&vccio_sd>;
+};
+
+&pcie_phy {
+ status = "okay";
+};
+
+&pcie0 {
+ ep-gpios = <&gpio0 RK_PB4 GPIO_ACTIVE_HIGH>;
+ max-link-speed = <2>;
+ num-lanes = <4>;
+ pinctrl-0 = <&pcie_clkreqnb_cpm>;
+ pinctrl-names = "default";
+ vpcie0v9-supply = <&vcca_0v9>; /* VCC_0V9_S0 */
+ vpcie1v8-supply = <&vcca_1v8>; /* VCC_1V8_S0 */
+ vpcie3v3-supply = <&vcc3v3_pcie>;
+ status = "okay";
+};
+
+&pinctrl {
+ hym8563 {
+ hym8563_int: hym8563-int {
+ rockchip,pins = <4 RK_PD6 0 &pcfg_pull_up>;
+ };
+ };
+
+ pcie {
+ pcie_pwr: pcie-pwr {
+ rockchip,pins = <4 RK_PD4 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+
+ pmic {
+ pmic_int_l: pmic-int-l {
+ rockchip,pins = <1 RK_PC2 0 &pcfg_pull_up>;
+ };
+ };
+
+ vbus_host {
+ usb1_en_oc: usb1-en-oc {
+ rockchip,pins = <4 RK_PD1 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+
+ vbus_typec {
+ usb0_en_oc: usb0-en-oc {
+ rockchip,pins = <4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
};
&pmu_io_domains {
@@ -317,17 +379,79 @@
status = "okay";
};
-&tsadc {
+&sdmmc {
+ cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>;
+ max-frequency = <150000000>;
+};
+
+&tcphy0 {
status = "okay";
+};
+
+&tsadc {
rockchip,hw-tshut-mode = <1>;
rockchip,hw-tshut-polarity = <1>;
+ status = "okay";
};
-&pinctrl {
- pmic {
- pmic_int_l: pmic-int-l {
- rockchip,pins =
- <1 RK_PC2 0 &pcfg_pull_up>;
- };
+&u2phy0 {
+ status = "okay";
+
+ u2phy0_otg: otg-port {
+ phy-supply = <&vbus_typec>;
+ status = "okay";
+ };
+
+ u2phy0_host: host-port {
+ phy-supply = <&vbus_host>;
+ status = "okay";
+ };
+};
+
+
+&u2phy1 {
+ status = "okay";
+
+ u2phy1_host: host-port {
+ phy-supply = <&vbus_host>;
+ status = "okay";
};
};
+
+&usb_host0_ehci {
+ status = "okay";
+};
+
+&usb_host0_ohci {
+ status = "okay";
+};
+
+&usb_host1_ehci {
+ status = "okay";
+};
+
+&usb_host1_ohci {
+ status = "okay";
+};
+
+&usbdrd3_0 {
+ status = "okay";
+};
+
+&usbdrd_dwc3_0 {
+ status = "okay";
+};
+
+&vbus_host {
+ enable-active-high;
+ gpio = <&gpio4 RK_PD1 GPIO_ACTIVE_HIGH>; /* USB1_EN_OC# */
+ pinctrl-names = "default";
+ pinctrl-0 = <&usb1_en_oc>;
+};
+
+&vbus_typec {
+ enable-active-high;
+ gpio = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>; /* USB0_EN_OC# */
+ pinctrl-names = "default";
+ pinctrl-0 = <&usb0_en_oc>;
+};