diff options
author | Miquel Raynal <miquel.raynal@bootlin.com> | 2019-12-24 15:39:00 +0100 |
---|---|---|
committer | Heiko Stuebner <heiko@sntech.de> | 2020-01-06 12:45:27 +0100 |
commit | dbb6f7787961d840cb6fa0a0e8e7bf77287d00f3 (patch) | |
tree | 89bb8fdbb6cdc8478685755b03eba30dda68d64e /arch/arm64/boot/dts/rockchip | |
parent | cc5912ab43a19b87777ead01235bc2c06c04cb44 (diff) |
arm64: dts: rockchip: Add PX30 LVDS
Describe LVDS IP. Add the CRTC and LVDS relevant endpoints so they can
be linked together.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/r/20191224143900.23567-12-miquel.raynal@bootlin.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'arch/arm64/boot/dts/rockchip')
-rw-r--r-- | arch/arm64/boot/dts/rockchip/px30.dtsi | 37 |
1 files changed, 37 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/rockchip/px30.dtsi b/arch/arm64/boot/dts/rockchip/px30.dtsi index 986ed249a733..b3fb9d317466 100644 --- a/arch/arm64/boot/dts/rockchip/px30.dtsi +++ b/arch/arm64/boot/dts/rockchip/px30.dtsi @@ -410,6 +410,33 @@ compatible = "rockchip,px30-io-voltage-domain"; status = "disabled"; }; + + lvds: lvds { + compatible = "rockchip,px30-lvds"; + #address-cells = <1>; + #size-cells = <0>; + phys = <&dsi_dphy>; + phy-names = "dphy"; + rockchip,grf = <&grf>; + rockchip,output = "lvds"; + status = "disabled"; + + port@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + + lvds_vopb_in: endpoint@0 { + reg = <0>; + remote-endpoint = <&vopb_out_lvds>; + }; + + lvds_vopl_in: endpoint@1 { + reg = <1>; + remote-endpoint = <&vopl_out_lvds>; + }; + }; + }; }; uart1: serial@ff158000 { @@ -1015,6 +1042,11 @@ reg = <0>; remote-endpoint = <&dsi_in_vopb>; }; + + vopb_out_lvds: endpoint@1 { + reg = <1>; + remote-endpoint = <&lvds_vopb_in>; + }; }; }; @@ -1052,6 +1084,11 @@ reg = <0>; remote-endpoint = <&dsi_in_vopl>; }; + + vopl_out_lvds: endpoint@1 { + reg = <1>; + remote-endpoint = <&lvds_vopl_in>; + }; }; }; |