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authorChunyan Zhang <zhang.chunyan@linaro.org>2015-07-15 15:05:48 +0800
committerOlof Johansson <olof@lixom.net>2015-07-15 06:00:22 -0400
commitfe467ad1e430ffbde37a61a7dacf6218f420d78b (patch)
tree3bcb10575382fc564786ea394807ce3cd69acec8 /arch/arm64/boot/dts/sprd
parentbc0195aad0daa2ad5b0d76cce22b167bc3435590 (diff)
arm64: dts: sprd: adding ETM entries to Spreadtrum SC9836
Since ETMv4 driver has been merged, this patch adds ETM nodes for SC9836, and four funnel input ports to connect with ETM output ports. Signed-off-by: Chunyan Zhang <zhang.chunyan@linaro.org> Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/arm64/boot/dts/sprd')
-rw-r--r--arch/arm64/boot/dts/sprd/sc9836.dtsi99
1 files changed, 94 insertions, 5 deletions
diff --git a/arch/arm64/boot/dts/sprd/sc9836.dtsi b/arch/arm64/boot/dts/sprd/sc9836.dtsi
index ee34e1a36e03..63894c456969 100644
--- a/arch/arm64/boot/dts/sprd/sc9836.dtsi
+++ b/arch/arm64/boot/dts/sprd/sc9836.dtsi
@@ -16,28 +16,28 @@
#address-cells = <2>;
#size-cells = <0>;
- cpu@0 {
+ cpu0: cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a53", "arm,armv8";
reg = <0x0 0x0>;
enable-method = "psci";
};
- cpu@1 {
+ cpu1: cpu@1 {
device_type = "cpu";
compatible = "arm,cortex-a53", "arm,armv8";
reg = <0x0 0x1>;
enable-method = "psci";
};
- cpu@2 {
+ cpu2: cpu@2 {
device_type = "cpu";
compatible = "arm,cortex-a53", "arm,armv8";
reg = <0x0 0x2>;
enable-method = "psci";
};
- cpu@3 {
+ cpu3: cpu@3 {
device_type = "cpu";
compatible = "arm,cortex-a53", "arm,armv8";
reg = <0x0 0x3>;
@@ -75,14 +75,103 @@
};
};
- /* funnel input port 0~3 is reserved for ETMs */
+ /* funnel input port 0-4 */
port@1 {
+ reg = <0>;
+ funnel_in_port0: endpoint {
+ slave-mode;
+ remote-endpoint = <&etm0_out>;
+ };
+ };
+
+ port@2 {
+ reg = <1>;
+ funnel_in_port1: endpoint {
+ slave-mode;
+ remote-endpoint = <&etm1_out>;
+ };
+ };
+
+ port@3 {
+ reg = <2>;
+ funnel_in_port2: endpoint {
+ slave-mode;
+ remote-endpoint = <&etm2_out>;
+ };
+ };
+
+ port@4 {
+ reg = <3>;
+ funnel_in_port3: endpoint {
+ slave-mode;
+ remote-endpoint = <&etm3_out>;
+ };
+ };
+
+ port@5 {
reg = <4>;
funnel_in_port4: endpoint {
slave-mode;
remote-endpoint = <&stm_out>;
};
};
+ /* Other input ports aren't connected to anyone */
+ };
+ };
+
+ etm@10440000 {
+ compatible = "arm,coresight-etm4x", "arm,primecell";
+ reg = <0 0x10440000 0 0x1000>;
+
+ cpu = <&cpu0>;
+ clocks = <&clk26mhz>;
+ clock-names = "apb_pclk";
+ port {
+ etm0_out: endpoint {
+ remote-endpoint = <&funnel_in_port0>;
+ };
+ };
+ };
+
+ etm@10540000 {
+ compatible = "arm,coresight-etm4x", "arm,primecell";
+ reg = <0 0x10540000 0 0x1000>;
+
+ cpu = <&cpu1>;
+ clocks = <&clk26mhz>;
+ clock-names = "apb_pclk";
+ port {
+ etm1_out: endpoint {
+ remote-endpoint = <&funnel_in_port1>;
+ };
+ };
+ };
+
+ etm@10640000 {
+ compatible = "arm,coresight-etm4x", "arm,primecell";
+ reg = <0 0x10640000 0 0x1000>;
+
+ cpu = <&cpu2>;
+ clocks = <&clk26mhz>;
+ clock-names = "apb_pclk";
+ port {
+ etm2_out: endpoint {
+ remote-endpoint = <&funnel_in_port2>;
+ };
+ };
+ };
+
+ etm@10740000 {
+ compatible = "arm,coresight-etm4x", "arm,primecell";
+ reg = <0 0x10740000 0 0x1000>;
+
+ cpu = <&cpu3>;
+ clocks = <&clk26mhz>;
+ clock-names = "apb_pclk";
+ port {
+ etm3_out: endpoint {
+ remote-endpoint = <&funnel_in_port3>;
+ };
};
};