diff options
| author | Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> | 2022-05-26 22:41:36 +0200 |
|---|---|---|
| committer | Nishanth Menon <nm@ti.com> | 2022-06-17 20:24:02 -0500 |
| commit | 5888f1ed173e78fb06ebd2aae61061166dd6b359 (patch) | |
| tree | 2595620e2ee22e2130aaa8097644f6111496a96b /arch/arm64/boot/dts/ti/k3-am65-main.dtsi | |
| parent | 0c0af88f3f318e73237f7fadd02d0bf2b6c996bb (diff) | |
arm64: dts: ti: Adjust whitespace around '='
Fix whitespace coding style: use single space instead of tabs or
multiple spaces around '=' sign in property assignment. No functional
changes (same DTB).
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Nishanth Menon <nm@ti.com>
Link: https://lore.kernel.org/r/20220526204139.831895-1-krzysztof.kozlowski@linaro.org
Diffstat (limited to 'arch/arm64/boot/dts/ti/k3-am65-main.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/ti/k3-am65-main.dtsi | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi index e749343acced..8919fede3cd7 100644 --- a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi @@ -690,7 +690,7 @@ pcie0_rc: pcie@5500000 { compatible = "ti,am654-pcie-rc"; - reg = <0x0 0x5500000 0x0 0x1000>, <0x0 0x5501000 0x0 0x1000>, <0x0 0x10000000 0x0 0x2000>, <0x0 0x5506000 0x0 0x1000>; + reg = <0x0 0x5500000 0x0 0x1000>, <0x0 0x5501000 0x0 0x1000>, <0x0 0x10000000 0x0 0x2000>, <0x0 0x5506000 0x0 0x1000>; reg-names = "app", "dbics", "config", "atu"; power-domains = <&k3_pds 120 TI_SCI_PD_EXCLUSIVE>; #address-cells = <3>; @@ -710,7 +710,7 @@ pcie0_ep: pcie-ep@5500000 { compatible = "ti,am654-pcie-ep"; - reg = <0x0 0x5500000 0x0 0x1000>, <0x0 0x5501000 0x0 0x1000>, <0x0 0x10000000 0x0 0x8000000>, <0x0 0x5506000 0x0 0x1000>; + reg = <0x0 0x5500000 0x0 0x1000>, <0x0 0x5501000 0x0 0x1000>, <0x0 0x10000000 0x0 0x8000000>, <0x0 0x5506000 0x0 0x1000>; reg-names = "app", "dbics", "addr_space", "atu"; power-domains = <&k3_pds 120 TI_SCI_PD_EXCLUSIVE>; ti,syscon-pcie-mode = <&pcie0_mode>; @@ -723,7 +723,7 @@ pcie1_rc: pcie@5600000 { compatible = "ti,am654-pcie-rc"; - reg = <0x0 0x5600000 0x0 0x1000>, <0x0 0x5601000 0x0 0x1000>, <0x0 0x18000000 0x0 0x2000>, <0x0 0x5606000 0x0 0x1000>; + reg = <0x0 0x5600000 0x0 0x1000>, <0x0 0x5601000 0x0 0x1000>, <0x0 0x18000000 0x0 0x2000>, <0x0 0x5606000 0x0 0x1000>; reg-names = "app", "dbics", "config", "atu"; power-domains = <&k3_pds 121 TI_SCI_PD_EXCLUSIVE>; #address-cells = <3>; @@ -743,7 +743,7 @@ pcie1_ep: pcie-ep@5600000 { compatible = "ti,am654-pcie-ep"; - reg = <0x0 0x5600000 0x0 0x1000>, <0x0 0x5601000 0x0 0x1000>, <0x0 0x18000000 0x0 0x4000000>, <0x0 0x5606000 0x0 0x1000>; + reg = <0x0 0x5600000 0x0 0x1000>, <0x0 0x5601000 0x0 0x1000>, <0x0 0x18000000 0x0 0x4000000>, <0x0 0x5606000 0x0 0x1000>; reg-names = "app", "dbics", "addr_space", "atu"; power-domains = <&k3_pds 121 TI_SCI_PD_EXCLUSIVE>; ti,syscon-pcie-mode = <&pcie1_mode>; @@ -843,9 +843,9 @@ power-domains = <&k3_pds 67 TI_SCI_PD_EXCLUSIVE>; - clocks = <&k3_clks 67 1>, - <&k3_clks 216 1>, - <&k3_clks 67 2>; + clocks = <&k3_clks 67 1>, + <&k3_clks 216 1>, + <&k3_clks 67 2>; clock-names = "fck", "vp1", "vp2"; /* |