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authorPierre Gondois <pierre.gondois@arm.com>2022-11-07 16:57:16 +0100
committerVignesh Raghavendra <vigneshr@ti.com>2023-01-16 19:01:06 +0530
commit880932e657ffc677c1b053a947afa87ffed1b29d (patch)
tree354ae066d5b2a4555ea990048ce6a04e70f0b728 /arch/arm64/boot/dts/ti/k3-j721s2.dtsi
parentc48ac0efe6d71050f635b40116ba714961ad9d4c (diff)
arm64: dts: Update cache properties for ti
The DeviceTree Specification v0.3 specifies that the cache node 'compatible' and 'cache-level' properties are 'required'. Cf. s3.8 Multi-level and Shared Cache Nodes The 'cache-unified' property should be present if one of the properties for unified cache is present ('cache-size', ...). Update the Device Trees accordingly. Signed-off-by: Pierre Gondois <pierre.gondois@arm.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Link: https://lore.kernel.org/r/20221107155825.1644604-24-pierre.gondois@arm.com
Diffstat (limited to 'arch/arm64/boot/dts/ti/k3-j721s2.dtsi')
-rw-r--r--arch/arm64/boot/dts/ti/k3-j721s2.dtsi1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/ti/k3-j721s2.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2.dtsi
index 7b930a85a29d..78295ee0fee5 100644
--- a/arch/arm64/boot/dts/ti/k3-j721s2.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721s2.dtsi
@@ -69,6 +69,7 @@
L2_0: l2-cache0 {
compatible = "cache";
+ cache-unified;
cache-level = <2>;
cache-size = <0x100000>;
cache-line-size = <64>;