diff options
| author | Michal Simek <michal.simek@xilinx.com> | 2021-01-21 11:26:56 +0100 |
|---|---|---|
| committer | Michal Simek <michal.simek@xilinx.com> | 2021-02-01 10:36:32 +0100 |
| commit | 41b452a5702b4a35b4ddb12a83ca21875e366d50 (patch) | |
| tree | 4f28524fccf34008dfad61762f1d9763cbc90e92 /arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi | |
| parent | 63481699d6e35d38490e2a0b388999f8aa0945b3 (diff) | |
arm64: dts: zynqmp: Wire arasan nand controller
Add missing arasan controller with clocks. Disable it by default. Every
board can enable it with specifying others properties.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/05cc1ce7973ac5200aeca428c137b422c827c5e8.1611224800.git.michal.simek@xilinx.com
Diffstat (limited to 'arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi index c94c3bb67edc..7af57619436d 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi +++ b/arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi @@ -116,6 +116,10 @@ clocks = <&zynqmp_clk ADMA_REF>, <&zynqmp_clk LPD_LSBUS>; }; +&nand0 { + clocks = <&zynqmp_clk NAND_REF>, <&zynqmp_clk LPD_LSBUS>; +}; + &gem0 { clocks = <&zynqmp_clk LPD_LSBUS>, <&zynqmp_clk GEM0_REF>, <&zynqmp_clk GEM0_TX>, <&zynqmp_clk GEM0_RX>, |