diff options
| author | Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> | 2022-04-07 16:32:23 +0200 |
|---|---|---|
| committer | Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> | 2022-04-26 12:38:17 +0200 |
| commit | 402eb8ec54b36f8fc0649768c01abb57062d6f8b (patch) | |
| tree | 3657f76f97aafd1d809ba5afbc7867ec75e1be93 /arch/arm64/boot/dts | |
| parent | 65b96377bf9130617ced41f317f3ec387d3e0dc3 (diff) | |
arm64: dts: microchip: align SPI NOR node name with dtschema
The node names should be generic and SPI NOR dtschema expects "flash".
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Link: https://lore.kernel.org/r/20220407143223.295344-2-krzysztof.kozlowski@linaro.org
Diffstat (limited to 'arch/arm64/boot/dts')
4 files changed, 7 insertions, 7 deletions
diff --git a/arch/arm64/boot/dts/microchip/sparx5_nand.dtsi b/arch/arm64/boot/dts/microchip/sparx5_nand.dtsi index 03f107e427d7..ce0747fd6444 100644 --- a/arch/arm64/boot/dts/microchip/sparx5_nand.dtsi +++ b/arch/arm64/boot/dts/microchip/sparx5_nand.dtsi @@ -19,7 +19,7 @@ #address-cells = <1>; #size-cells = <0>; reg = <14>; /* CS14 */ - spi-flash@6 { + flash@6 { compatible = "spi-nand"; pinctrl-0 = <&cs14_pins>; pinctrl-names = "default"; diff --git a/arch/arm64/boot/dts/microchip/sparx5_pcb125.dts b/arch/arm64/boot/dts/microchip/sparx5_pcb125.dts index 9baa085d7861..dbf8c1d48a02 100644 --- a/arch/arm64/boot/dts/microchip/sparx5_pcb125.dts +++ b/arch/arm64/boot/dts/microchip/sparx5_pcb125.dts @@ -47,7 +47,7 @@ #address-cells = <1>; #size-cells = <0>; reg = <0>; /* CS0 */ - spi-flash@9 { + flash@9 { compatible = "jedec,spi-nor"; spi-max-frequency = <8000000>; reg = <0x9>; /* SPI */ @@ -59,7 +59,7 @@ #address-cells = <1>; #size-cells = <0>; reg = <1>; /* CS1 */ - spi-flash@9 { + flash@9 { compatible = "spi-nand"; pinctrl-0 = <&cs1_pins>; pinctrl-names = "default"; diff --git a/arch/arm64/boot/dts/microchip/sparx5_pcb134_board.dtsi b/arch/arm64/boot/dts/microchip/sparx5_pcb134_board.dtsi index 33faf1f3264f..699256f1b9d8 100644 --- a/arch/arm64/boot/dts/microchip/sparx5_pcb134_board.dtsi +++ b/arch/arm64/boot/dts/microchip/sparx5_pcb134_board.dtsi @@ -274,7 +274,7 @@ &spi0 { status = "okay"; - spi-flash@0 { + flash@0 { compatible = "jedec,spi-nor"; spi-max-frequency = <8000000>; reg = <0>; @@ -289,7 +289,7 @@ #address-cells = <1>; #size-cells = <0>; reg = <0>; /* CS0 */ - spi-flash@9 { + flash@9 { compatible = "jedec,spi-nor"; spi-max-frequency = <8000000>; reg = <0x9>; /* SPI */ diff --git a/arch/arm64/boot/dts/microchip/sparx5_pcb135_board.dtsi b/arch/arm64/boot/dts/microchip/sparx5_pcb135_board.dtsi index ef96e6d8c6b3..d10a9172b529 100644 --- a/arch/arm64/boot/dts/microchip/sparx5_pcb135_board.dtsi +++ b/arch/arm64/boot/dts/microchip/sparx5_pcb135_board.dtsi @@ -89,7 +89,7 @@ &spi0 { status = "okay"; - spi-flash@0 { + flash@0 { compatible = "jedec,spi-nor"; spi-max-frequency = <8000000>; reg = <0>; @@ -104,7 +104,7 @@ #address-cells = <1>; #size-cells = <0>; reg = <0>; /* CS0 */ - spi-flash@9 { + flash@9 { compatible = "jedec,spi-nor"; spi-max-frequency = <8000000>; reg = <0x9>; /* SPI */ |