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authorChanho Park <chanho61.park@samsung.com>2021-10-21 10:20:17 +0900
committerKrzysztof Kozlowski <krzysztof.kozlowski@canonical.com>2021-10-26 09:17:42 +0200
commitb2f217cc7fbd3e6a097021b8b663328a649ea232 (patch)
tree679514ab5964500d294f8a78cddbbff79310396b /arch/arm64/boot/dts
parent4b1a78330df4742aa862468911b38c36d3edba30 (diff)
arm64: dts: exynos: add chipid node for exynosautov9 SoC
It can be compatible with exynos850's chipid. The SoC has eight chipid registers that can be used for OTP. Cc: Sam Protsenko <semen.protsenko@linaro.org> Signed-off-by: Chanho Park <chanho61.park@samsung.com> Link: https://lore.kernel.org/r/20211021012017.158919-3-chanho61.park@samsung.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Diffstat (limited to 'arch/arm64/boot/dts')
-rw-r--r--arch/arm64/boot/dts/exynos/exynosautov9.dtsi5
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/exynos/exynosautov9.dtsi b/arch/arm64/boot/dts/exynos/exynosautov9.dtsi
index 932d7525d4b8..3e4727344b4a 100644
--- a/arch/arm64/boot/dts/exynos/exynosautov9.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynosautov9.dtsi
@@ -184,6 +184,11 @@
#size-cells = <1>;
ranges = <0x0 0x0 0x0 0x20000000>;
+ chipid@10000000 {
+ compatible = "samsung,exynos850-chipid";
+ reg = <0x10000000 0x24>;
+ };
+
gic: interrupt-controller@10101000 {
compatible = "arm,gic-400";
#interrupt-cells = <3>;