diff options
| author | Luca Weiss <luca@z3ntu.xyz> | 2021-10-07 23:24:34 +0200 |
|---|---|---|
| committer | Bjorn Andersson <bjorn.andersson@linaro.org> | 2021-10-23 22:07:08 -0500 |
| commit | cd10fb7993830f9c52216f1489ffcfc296fc53dc (patch) | |
| tree | 6a48b2c2320a890138a214def6fa73b8c201e631 /arch/arm64/boot/dts | |
| parent | d8a3c775d7cd6fa6ba209cf1811ba05d8c01ecb8 (diff) | |
arm64: dts: qcom: sm6350: add debug uart
Add the necessary nodes for the debug uart on SM6350.
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211007212444.328034-8-luca@z3ntu.xyz
Diffstat (limited to 'arch/arm64/boot/dts')
| -rw-r--r-- | arch/arm64/boot/dts/qcom/sm6350.dtsi | 31 |
1 files changed, 31 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/qcom/sm6350.dtsi b/arch/arm64/boot/dts/qcom/sm6350.dtsi index 926d30c57add..973e18fe3b67 100644 --- a/arch/arm64/boot/dts/qcom/sm6350.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6350.dtsi @@ -443,6 +443,30 @@ }; }; + qupv3_id_1: geniqup@9c0000 { + compatible = "qcom,geni-se-qup"; + reg = <0x0 0x9c0000 0x0 0x2000>; + clock-names = "m-ahb", "s-ahb"; + clocks = <&gcc GCC_QUPV3_WRAP_1_M_AHB_CLK>, + <&gcc GCC_QUPV3_WRAP_1_S_AHB_CLK>; + #address-cells = <2>; + #size-cells = <2>; + iommus = <&apps_smmu 0x4c3 0x0>; + ranges; + status = "disabled"; + + uart2: serial@98c000 { + compatible = "qcom,geni-debug-uart"; + reg = <0 0x98c000 0 0x4000>; + clock-names = "se"; + clocks = <&gcc GCC_QUPV3_WRAP1_S3_CLK>; + pinctrl-names = "default"; + pinctrl-0 = <&qup_uart2_default>; + interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; + status = "disabled"; + }; + }; + tcsr_mutex: hwlock@1f40000 { compatible = "qcom,tcsr-mutex"; reg = <0x0 0x01f40000 0x0 0x40000>; @@ -670,6 +694,13 @@ interrupt-controller; #interrupt-cells = <2>; gpio-ranges = <&tlmm 0 0 157>; + + qup_uart2_default: qup-uart2-default { + pins = "gpio25", "gpio26"; + function = "qup13_f2"; + drive-strength = <2>; + bias-disable; + }; }; apps_smmu: iommu@15000000 { |