diff options
| author | Alexandre Mergnat <amergnat@baylibre.com> | 2023-09-25 20:17:39 +0200 |
|---|---|---|
| committer | Matthias Brugger <matthias.bgg@gmail.com> | 2023-10-18 09:46:57 +0200 |
| commit | 2bb2410e70e378ec709c8baeb9105b4478902f42 (patch) | |
| tree | 5e2b5c57ef3b344297e3e25b420e991202f15d8e /arch/arm64/boot | |
| parent | c70ca9a2d09ae11063cbc166fe7718ed88cefa72 (diff) | |
arm64: dts: mediatek: add smi support for mt8365 SoC
Smart Multimedia Interface (SMI) local arbiter does the arbitration for
memory requests from multi-media engines. Add SMI in the MT8365 DTS will
allow to add local ARBiter (LARB), use by IOMMU.
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Alexandre Mergnat <amergnat@baylibre.com>
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20230207-iommu-support-v6-5-24453c8625b3@baylibre.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Diffstat (limited to 'arch/arm64/boot')
| -rw-r--r-- | arch/arm64/boot/dts/mediatek/mt8365.dtsi | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/mediatek/mt8365.dtsi b/arch/arm64/boot/dts/mediatek/mt8365.dtsi index c2f88d153dee..a03b8c0da68b 100644 --- a/arch/arm64/boot/dts/mediatek/mt8365.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8365.dtsi @@ -340,16 +340,19 @@ "cam-4", "cam-5"; #power-domain-cells = <0>; mediatek,infracfg = <&infracfg>; + mediatek,smi = <&smi_common>; }; power-domain@MT8365_POWER_DOMAIN_VDEC { reg = <MT8365_POWER_DOMAIN_VDEC>; #power-domain-cells = <0>; + mediatek,smi = <&smi_common>; }; power-domain@MT8365_POWER_DOMAIN_VENC { reg = <MT8365_POWER_DOMAIN_VENC>; #power-domain-cells = <0>; + mediatek,smi = <&smi_common>; }; power-domain@MT8365_POWER_DOMAIN_APU { @@ -367,6 +370,7 @@ "apu-5"; #power-domain-cells = <0>; mediatek,infracfg = <&infracfg>; + mediatek,smi = <&smi_common>; }; }; @@ -720,6 +724,17 @@ #clock-cells = <1>; }; + smi_common: smi@14002000 { + compatible = "mediatek,mt8365-smi-common"; + reg = <0 0x14002000 0 0x1000>; + clocks = <&mmsys CLK_MM_MM_SMI_COMMON>, + <&mmsys CLK_MM_MM_SMI_COMMON>, + <&mmsys CLK_MM_MM_SMI_COMM0>, + <&mmsys CLK_MM_MM_SMI_COMM1>; + clock-names = "apb", "smi", "gals0", "gals1"; + power-domains = <&spm MT8365_POWER_DOMAIN_MM>; + }; + camsys: syscon@15000000 { compatible = "mediatek,mt8365-imgsys", "syscon"; reg = <0 0x15000000 0 0x1000>; |