diff options
| author | Joakim Zhang <qiangqing.zhang@nxp.com> | 2020-06-29 16:42:30 +0800 |
|---|---|---|
| committer | Shawn Guo <shawnguo@kernel.org> | 2020-07-13 10:19:19 +0800 |
| commit | b39cb21faee77e8bab988f562e3aeb46b98cc59b (patch) | |
| tree | b365b0282c49a20948d394bfdcbad0a5d60f4f83 /arch/arm64/boot | |
| parent | c147caa6e8a47edbc6735848499191a642d49933 (diff) | |
arm64: dts: imx8mp: add ddr pmu device node
Add ddr pmu device node for i.MX8MP.
Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm64/boot')
| -rw-r--r-- | arch/arm64/boot/dts/freescale/imx8mp.dtsi | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi index 90bdef8447fa..9de2aa1c573c 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi @@ -744,5 +744,11 @@ interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>; interrupt-parent = <&gic>; }; + + ddr-pmu@3d800000 { + compatible = "fsl,imx8mp-ddr-pmu", "fsl,imx8m-ddr-pmu"; + reg = <0x3d800000 0x400000>; + interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>; + }; }; }; |