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authorWill Deacon <will.deacon@arm.com>2018-04-30 13:56:32 +0100
committerCatalin Marinas <catalin.marinas@arm.com>2018-05-16 12:21:19 +0100
commit1cfc63b5ae60fe7e01773f38132f98d8b13a99a0 (patch)
tree26b8bdfb1f4ed97238a496c47f047936ddb5d866 /arch/arm64/include/asm/cmpxchg.h
parente75bef2a4fe259b779765a85589e92657d26fdc9 (diff)
arm64: cmpwait: Clear event register before arming exclusive monitor
When waiting for a cacheline to change state in cmpwait, we may immediately wake-up the first time around the outer loop if the event register was already set (for example, because of the event stream). Avoid these spurious wakeups by explicitly clearing the event register before loading the cacheline and setting the exclusive monitor. Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to 'arch/arm64/include/asm/cmpxchg.h')
-rw-r--r--arch/arm64/include/asm/cmpxchg.h4
1 files changed, 3 insertions, 1 deletions
diff --git a/arch/arm64/include/asm/cmpxchg.h b/arch/arm64/include/asm/cmpxchg.h
index 4f5fd2a36e6e..3b0938281541 100644
--- a/arch/arm64/include/asm/cmpxchg.h
+++ b/arch/arm64/include/asm/cmpxchg.h
@@ -204,7 +204,9 @@ static inline void __cmpwait_case_##name(volatile void *ptr, \
unsigned long tmp; \
\
asm volatile( \
- " ldxr" #sz "\t%" #w "[tmp], %[v]\n" \
+ " sevl\n" \
+ " wfe\n" \
+ " ldxr" #sz "\t%" #w "[tmp], %[v]\n" \
" eor %" #w "[tmp], %" #w "[tmp], %" #w "[val]\n" \
" cbnz %" #w "[tmp], 1f\n" \
" wfe\n" \