diff options
| author | Suzuki K Poulose <suzuki.poulose@arm.com> | 2016-09-09 14:07:08 +0100 |
|---|---|---|
| committer | Will Deacon <will.deacon@arm.com> | 2016-09-09 15:03:28 +0100 |
| commit | ee7bc638f140e0586941002ffb82765743dabb97 (patch) | |
| tree | 8c2f588bd8e6b24ab99196a8bd1f4eecfab83621 /arch/arm64/include/asm/cpufeature.h | |
| parent | 7ba5f605f3a0d9495aad539eeb8346d726dfc183 (diff) | |
arm64: Set the safe value for L1 icache policy
Right now we use 0 as the safe value for CTR_EL0:L1Ip, which is
not defined at the moment. The safer value for the L1Ip should be
the weakest of the policies, which happens to be AIVIVT. While at it,
fix the comment about safe_val.
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'arch/arm64/include/asm/cpufeature.h')
| -rw-r--r-- | arch/arm64/include/asm/cpufeature.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm64/include/asm/cpufeature.h b/arch/arm64/include/asm/cpufeature.h index 23a76dc5a6cf..bd950b00a575 100644 --- a/arch/arm64/include/asm/cpufeature.h +++ b/arch/arm64/include/asm/cpufeature.h @@ -65,7 +65,7 @@ struct arm64_ftr_bits { enum ftr_type type; u8 shift; u8 width; - s64 safe_val; /* safe value for discrete features */ + s64 safe_val; /* safe value for FTR_EXACT features */ }; /* |