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authorWill Deacon <will.deacon@arm.com>2018-11-29 16:31:04 +0000
committerWill Deacon <will.deacon@arm.com>2018-11-29 16:36:18 +0000
commit1b57ec8c75279b873639eb44a215479236f93481 (patch)
tree3095f250ec6151dcde24902726588ce02a963c07 /arch/arm64/include/asm/io.h
parent3d65b6bbc01ecece8142e62a8a5f1d48ba41a240 (diff)
arm64: io: Ensure value passed to __iormb() is held in a 64-bit register
As of commit 6460d3201471 ("arm64: io: Ensure calls to delay routines are ordered against prior readX()"), MMIO reads smaller than 64 bits fail to compile under clang because we end up mixing 32-bit and 64-bit register operands for the same data processing instruction: ./include/asm-generic/io.h:695:9: warning: value size does not match register size specified by the constraint and modifier [-Wasm-operand-widths] return readb(addr); ^ ./arch/arm64/include/asm/io.h:147:58: note: expanded from macro 'readb' ^ ./include/asm-generic/io.h:695:9: note: use constraint modifier "w" ./arch/arm64/include/asm/io.h:147:50: note: expanded from macro 'readb' ^ ./arch/arm64/include/asm/io.h:118:24: note: expanded from macro '__iormb' asm volatile("eor %0, %1, %1\n" \ ^ Fix the build by casting the macro argument to 'unsigned long' when used as an input to the inline asm. Reported-by: Nick Desaulniers <nick.desaulniers@gmail.com> Reported-by: Nathan Chancellor <natechancellor@gmail.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'arch/arm64/include/asm/io.h')
-rw-r--r--arch/arm64/include/asm/io.h3
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/arm64/include/asm/io.h b/arch/arm64/include/asm/io.h
index d42d00d8d5b6..ee723835c1f4 100644
--- a/arch/arm64/include/asm/io.h
+++ b/arch/arm64/include/asm/io.h
@@ -117,7 +117,8 @@ static inline u64 __raw_readq(const volatile void __iomem *addr)
*/ \
asm volatile("eor %0, %1, %1\n" \
"cbnz %0, ." \
- : "=r" (tmp) : "r" (v) : "memory"); \
+ : "=r" (tmp) : "r" ((unsigned long)(v)) \
+ : "memory"); \
})
#define __iowmb() wmb()