diff options
author | Will Deacon <will@kernel.org> | 2024-01-04 12:28:14 +0000 |
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committer | Will Deacon <will@kernel.org> | 2024-01-04 12:28:14 +0000 |
commit | 30431774fe6e96f9418911f36b99914f54089d75 (patch) | |
tree | 66dbdc996775f1a6ff38858d2015211e94fd68b3 /arch/arm64/include | |
parent | dd9168ab08ebbf5643434c652a5f22ffa96dbdf3 (diff) | |
parent | f35c32ca6839f5777862dbe2138d02bf50b3dfa7 (diff) |
Merge branch 'for-next/rip-vpipt' into for-next/core
* for-next/rip-vpipt:
arm64: Rename reserved values for CTR_EL0.L1Ip
arm64: Kill detection of VPIPT i-cache policy
KVM: arm64: Remove VPIPT I-cache handling
Diffstat (limited to 'arch/arm64/include')
-rw-r--r-- | arch/arm64/include/asm/cache.h | 6 | ||||
-rw-r--r-- | arch/arm64/include/asm/kvm_mmu.h | 7 |
2 files changed, 0 insertions, 13 deletions
diff --git a/arch/arm64/include/asm/cache.h b/arch/arm64/include/asm/cache.h index ceb368d33bf4..06a4670bdb0b 100644 --- a/arch/arm64/include/asm/cache.h +++ b/arch/arm64/include/asm/cache.h @@ -58,7 +58,6 @@ static inline unsigned int arch_slab_minalign(void) #define CTR_L1IP(ctr) SYS_FIELD_GET(CTR_EL0, L1Ip, ctr) #define ICACHEF_ALIASING 0 -#define ICACHEF_VPIPT 1 extern unsigned long __icache_flags; /* @@ -70,11 +69,6 @@ static inline int icache_is_aliasing(void) return test_bit(ICACHEF_ALIASING, &__icache_flags); } -static __always_inline int icache_is_vpipt(void) -{ - return test_bit(ICACHEF_VPIPT, &__icache_flags); -} - static inline u32 cache_type_cwg(void) { return SYS_FIELD_GET(CTR_EL0, CWG, read_cpuid_cachetype()); diff --git a/arch/arm64/include/asm/kvm_mmu.h b/arch/arm64/include/asm/kvm_mmu.h index 49e0d4b36bd0..e3e793d0ec30 100644 --- a/arch/arm64/include/asm/kvm_mmu.h +++ b/arch/arm64/include/asm/kvm_mmu.h @@ -244,13 +244,6 @@ static inline size_t __invalidate_icache_max_range(void) static inline void __invalidate_icache_guest_page(void *va, size_t size) { /* - * VPIPT I-cache maintenance must be done from EL2. See comment in the - * nVHE flavor of __kvm_tlb_flush_vmid_ipa(). - */ - if (icache_is_vpipt() && read_sysreg(CurrentEL) != CurrentEL_EL2) - return; - - /* * Blow the whole I-cache if it is aliasing (i.e. VIPT) or the * invalidation range exceeds our arbitrary limit on invadations by * cache line. |