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authorWill Deacon <will.deacon@arm.com>2018-06-14 11:21:34 +0100
committerWill Deacon <will.deacon@arm.com>2018-12-06 16:47:04 +0000
commitbd4fb6d270bc423a9a4098108784f7f9254c4e6d (patch)
treeb795cee624fd00a3274c5d6efd89df71288cf1ff /arch/arm64/kernel/cpuinfo.c
parent0b587c84e42151fc5a636c7cebf7b03b281dc672 (diff)
arm64: Add support for SB barrier and patch in over DSB; ISB sequences
We currently use a DSB; ISB sequence to inhibit speculation in set_fs(). Whilst this works for current CPUs, future CPUs may implement a new SB barrier instruction which acts as an architected speculation barrier. On CPUs that support it, patch in an SB; NOP sequence over the DSB; ISB sequence and advertise the presence of the new instruction to userspace. Signed-off-by: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'arch/arm64/kernel/cpuinfo.c')
-rw-r--r--arch/arm64/kernel/cpuinfo.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm64/kernel/cpuinfo.c b/arch/arm64/kernel/cpuinfo.c
index bcc2831399cb..7cb0b08ab0a7 100644
--- a/arch/arm64/kernel/cpuinfo.c
+++ b/arch/arm64/kernel/cpuinfo.c
@@ -82,6 +82,7 @@ static const char *const hwcap_str[] = {
"ilrcpc",
"flagm",
"ssbs",
+ "sb",
NULL
};