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authorPeter Collingbourne <pcc@google.com>2020-12-02 23:34:58 -0800
committerCatalin Marinas <catalin.marinas@arm.com>2021-01-04 11:04:02 +0000
commitb614231dec7864a338ce85032aa3d2d7ea2bc46d (patch)
tree3b1fc83ab9207a50a38cd78c815f81cfcc29a1f6 /arch/arm64/kernel/entry.S
parent42e85f90171a4ba59a1e1cedbbc30ce3f68f2317 (diff)
arm64: mte: remove an ISB on kernel exit
This ISB is unnecessary because we will soon do an ERET. Signed-off-by: Peter Collingbourne <pcc@google.com> Link: https://linux-review.googlesource.com/id/I69f1ee6bb09b1372dd744a0e01cedaf090c8d448 Link: https://lore.kernel.org/r/20201203073458.2675400-1-pcc@google.com Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to 'arch/arm64/kernel/entry.S')
-rw-r--r--arch/arm64/kernel/entry.S2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm64/kernel/entry.S b/arch/arm64/kernel/entry.S
index 2a93fa5f4e49..a8c3e7aaca74 100644
--- a/arch/arm64/kernel/entry.S
+++ b/arch/arm64/kernel/entry.S
@@ -182,7 +182,6 @@ alternative_else_nop_endif
mrs_s \tmp2, SYS_GCR_EL1
bfi \tmp2, \tmp, #0, #16
msr_s SYS_GCR_EL1, \tmp2
- isb
#endif
.endm
@@ -194,6 +193,7 @@ alternative_else_nop_endif
ldr_l \tmp, gcr_kernel_excl
mte_set_gcr \tmp, \tmp2
+ isb
1:
#endif
.endm