diff options
| author | Akihiko Odaki <akihiko.odaki@daynix.com> | 2023-01-12 11:38:52 +0900 |
|---|---|---|
| committer | Oliver Upton <oliver.upton@linux.dev> | 2023-01-21 18:09:23 +0000 |
| commit | 7af0c2534f4c57b16e92dfca8c5f40fa90fbb3f3 (patch) | |
| tree | 81a282bcae6f2429eddee8f0a2dc07c8b862d378 /arch/arm64/kvm/reset.c | |
| parent | bf48040cd9b0c4d93c635ce222014a594e4e93f2 (diff) | |
KVM: arm64: Normalize cache configuration
Before this change, the cache configuration of the physical CPU was
exposed to vcpus. This is problematic because the cache configuration a
vcpu sees varies when it migrates between vcpus with different cache
configurations.
Fabricate cache configuration from the sanitized value, which holds the
CTR_EL0 value the userspace sees regardless of which physical CPU it
resides on.
CLIDR_EL1 and CCSIDR_EL1 are now writable from the userspace so that
the VMM can restore the values saved with the old kernel.
Suggested-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com>
Link: https://lore.kernel.org/r/20230112023852.42012-8-akihiko.odaki@daynix.com
[ Oliver: Squash Marc's fix for CCSIDR_EL1.LineSize when set from userspace ]
Signed-off-by: Oliver Upton <oliver.upton@linux.dev>
Diffstat (limited to 'arch/arm64/kvm/reset.c')
| -rw-r--r-- | arch/arm64/kvm/reset.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm64/kvm/reset.c b/arch/arm64/kvm/reset.c index e0267f672b8a..dc235ddc6172 100644 --- a/arch/arm64/kvm/reset.c +++ b/arch/arm64/kvm/reset.c @@ -157,6 +157,7 @@ void kvm_arm_vcpu_destroy(struct kvm_vcpu *vcpu) if (sve_state) kvm_unshare_hyp(sve_state, sve_state + vcpu_sve_state_size(vcpu)); kfree(sve_state); + kfree(vcpu->arch.ccsidr); } static void kvm_vcpu_reset_sve(struct kvm_vcpu *vcpu) |