diff options
| author | Mark Brown <broonie@kernel.org> | 2022-07-04 18:02:51 +0100 |
|---|---|---|
| committer | Will Deacon <will@kernel.org> | 2022-07-05 11:45:47 +0100 |
| commit | 9a3634d023012cf54e541f825ed11ff481c6a110 (patch) | |
| tree | 56cad1f652361bd038bf7a956761e180e82f1024 /arch/arm64/tools | |
| parent | b2d71f275d544719598ed754069f2bb421e4af17 (diff) | |
arm64/sysreg: Convert CTR_EL0 to automatic generation
Convert CTR_EL0 to automatic register generation as per DDI0487H.a, no
functional change.
Signed-off-by: Mark Brown <broonie@kernel.org>
Link: https://lore.kernel.org/r/20220704170302.2609529-18-broonie@kernel.org
Signed-off-by: Will Deacon <will@kernel.org>
Diffstat (limited to 'arch/arm64/tools')
| -rw-r--r-- | arch/arm64/tools/sysreg | 21 |
1 files changed, 21 insertions, 0 deletions
diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg index ff5e552f7420..a9f4c157c4be 100644 --- a/arch/arm64/tools/sysreg +++ b/arch/arm64/tools/sysreg @@ -273,6 +273,27 @@ Field 3:1 Level Field 0 InD EndSysreg +Sysreg CTR_EL0 3 3 0 0 1 +Res0 63:38 +Field 37:32 TminLine +Res1 31 +Res0 30 +Field 29 DIC +Field 28 IDC +Field 27:24 CWG +Field 23:20 ERG +Field 19:16 DminLine +Enum 15:14 L1Ip + 0b00 VPIPT + # This is named as AIVIVT in the ARM but documented as reserved + 0b01 RESERVED + 0b10 VIPT + 0b11 PIPT +EndEnum +Res0 13:4 +Field 3:0 IminLine +EndSysreg + Sysreg SVCR 3 3 4 2 2 Res0 63:2 Field 1 ZA |