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authorMichael Riesch <michael.riesch@wolfvision.net>2022-07-20 11:15:27 +0200
committerHeiko Stuebner <heiko@sntech.de>2022-09-04 18:10:24 +0200
commitb6c228401b2565b7bd59ad7418074145cdaa316a (patch)
tree5931bf4a64e64a1682a68c2c7955fdf31dd77bae /arch/arm64
parent86973ae0355bc302d5e4c10fa382f6801feb4b90 (diff)
arm64: dts: rockchip: add csi dphy node to rk356x
Add the MIPI CSI DPHY node to the RK356x device tree. Signed-off-by: Michael Riesch <michael.riesch@wolfvision.net> Link: https://lore.kernel.org/r/20220720091527.1270365-4-michael.riesch@wolfvision.net Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'arch/arm64')
-rw-r--r--arch/arm64/boot/dts/rockchip/rk356x.dtsi12
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
index 319981c3e9f7..c66b60302803 100644
--- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
@@ -1594,6 +1594,18 @@
status = "disabled";
};
+ csi_dphy: phy@fe870000 {
+ compatible = "rockchip,rk3568-csi-dphy";
+ reg = <0x0 0xfe870000 0x0 0x10000>;
+ clocks = <&cru PCLK_MIPICSIPHY>;
+ clock-names = "pclk";
+ #phy-cells = <0>;
+ resets = <&cru SRST_P_MIPICSIPHY>;
+ reset-names = "apb";
+ rockchip,grf = <&grf>;
+ status = "disabled";
+ };
+
usb2phy0: usb2phy@fe8a0000 {
compatible = "rockchip,rk3568-usb2phy";
reg = <0x0 0xfe8a0000 0x0 0x10000>;