summaryrefslogtreecommitdiff
path: root/arch/arm
diff options
context:
space:
mode:
authorFabio Estevam <fabio.estevam@freescale.com>2014-09-18 20:23:48 -0300
committerShawn Guo <shawn.guo@linaro.org>2014-11-23 15:08:04 +0800
commit685570aba0078e5d7805a8458e45a3e16c0d8384 (patch)
tree4c94b7828c192dc8b7aba8b4c24bdf31c180ef1b /arch/arm
parent2ce34b105c79ee0404b3a8f68c9ab2ce197dd06f (diff)
ARM: dts: imx53: Improve SSI clocks description
SSI block has 'ipg' clock for internal peripheral access and also 'baud' clock for generating bit clock when SSI operates in master mode. Add the extra 'baud' clock so that we can have SSI functional in master mode. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/boot/dts/imx53.dtsi12
1 files changed, 9 insertions, 3 deletions
diff --git a/arch/arm/boot/dts/imx53.dtsi b/arch/arm/boot/dts/imx53.dtsi
index f91725b2e8ab..2a5012a5202e 100644
--- a/arch/arm/boot/dts/imx53.dtsi
+++ b/arch/arm/boot/dts/imx53.dtsi
@@ -227,7 +227,9 @@
"fsl,imx21-ssi";
reg = <0x50014000 0x4000>;
interrupts = <30>;
- clocks = <&clks IMX5_CLK_SSI2_IPG_GATE>;
+ clocks = <&clks IMX5_CLK_SSI2_IPG_GATE>,
+ <&clks IMX5_CLK_SSI2_ROOT_GATE>;
+ clock-names = "ipg", "baud";
dmas = <&sdma 24 1 0>,
<&sdma 25 1 0>;
dma-names = "rx", "tx";
@@ -675,7 +677,9 @@
"fsl,imx21-ssi";
reg = <0x63fcc000 0x4000>;
interrupts = <29>;
- clocks = <&clks IMX5_CLK_SSI1_IPG_GATE>;
+ clocks = <&clks IMX5_CLK_SSI1_IPG_GATE>,
+ <&clks IMX5_CLK_SSI1_ROOT_GATE>;
+ clock-names = "ipg", "baud";
dmas = <&sdma 28 0 0>,
<&sdma 29 0 0>;
dma-names = "rx", "tx";
@@ -703,7 +707,9 @@
"fsl,imx21-ssi";
reg = <0x63fe8000 0x4000>;
interrupts = <96>;
- clocks = <&clks IMX5_CLK_SSI3_IPG_GATE>;
+ clocks = <&clks IMX5_CLK_SSI3_IPG_GATE>,
+ <&clks IMX5_CLK_SSI3_ROOT_GATE>;
+ clock-names = "ipg", "baud";
dmas = <&sdma 46 0 0>,
<&sdma 47 0 0>;
dma-names = "rx", "tx";