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authorPaolo Bonzini <pbonzini@redhat.com>2023-08-31 13:18:53 -0400
committerPaolo Bonzini <pbonzini@redhat.com>2023-08-31 13:18:53 -0400
commite0fb12c673e53d2a103b9e0abc92204de0fc325d (patch)
tree3f91fa1ed8efb9e2b80e542075fb93cdbd0c3370 /arch/arm
parent2dde18cd1d8fac735875f2e4987f11817cc0bc2c (diff)
parent1f66f1246bfa08aaf13db897736de49cbeaf72a1 (diff)
Merge tag 'kvmarm-6.6' of git://git.kernel.org/pub/scm/linux/kernel/git/kvmarm/kvmarm into HEAD
KVM/arm64 updates for Linux 6.6 - Add support for TLB range invalidation of Stage-2 page tables, avoiding unnecessary invalidations. Systems that do not implement range invalidation still rely on a full invalidation when dealing with large ranges. - Add infrastructure for forwarding traps taken from a L2 guest to the L1 guest, with L0 acting as the dispatcher, another baby step towards the full nested support. - Simplify the way we deal with the (long deprecated) 'CPU target', resulting in a much needed cleanup. - Fix another set of PMU bugs, both on the guest and host sides, as we seem to never have any shortage of those... - Relax the alignment requirements of EL2 VA allocations for non-stack allocations, as we were otherwise wasting a lot of that precious VA space. - The usual set of non-functional cleanups, although I note the lack of spelling fixes...
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/include/asm/arm_pmuv3.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arm_pmuv3.h b/arch/arm/include/asm/arm_pmuv3.h
index f3cd04ff022d..72529f5e2bed 100644
--- a/arch/arm/include/asm/arm_pmuv3.h
+++ b/arch/arm/include/asm/arm_pmuv3.h
@@ -227,6 +227,8 @@ static inline bool kvm_set_pmuserenr(u64 val)
return false;
}
+static inline void kvm_vcpu_pmu_resync_el0(void) {}
+
/* PMU Version in DFR Register */
#define ARMV8_PMU_DFR_VER_NI 0
#define ARMV8_PMU_DFR_VER_V3P4 0x5