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authorRomain Izard <romain.izard.pro@gmail.com>2018-11-20 17:57:37 +0100
committerAlexandre Belloni <alexandre.belloni@bootlin.com>2018-11-21 11:50:32 +0100
commit4ab7ca092c3c7ac8b16aa28eba723a8868f82f14 (patch)
tree083a9c23bbdcdb3bac49255d55cae7e803c55bc8 /arch/arm
parent651022382c7f8da46cb4872a545ee1da6d097d2a (diff)
ARM: dts: at91: sama5d2: use the divided clock for SMC
The SAMA5D2 is different from SAMA5D3 and SAMA5D4, as there are two different clocks for the peripherals in the SoC. The Static Memory controller is connected to the divided master clock. Unfortunately, the device tree does not correctly show this and uses the master clock directly. This clock is then used by the code for the NAND controller to calculate the timings for the controller, and we end up with slow NAND Flash access. Fix the device tree, and the performance of Flash access is improved. Signed-off-by: Romain Izard <romain.izard.pro@gmail.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/boot/dts/sama5d2.dtsi2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi
index 843052f14f1c..dd0dda6ed44b 100644
--- a/arch/arm/boot/dts/sama5d2.dtsi
+++ b/arch/arm/boot/dts/sama5d2.dtsi
@@ -314,7 +314,7 @@
0x1 0x0 0x60000000 0x10000000
0x2 0x0 0x70000000 0x10000000
0x3 0x0 0x80000000 0x10000000>;
- clocks = <&mck>;
+ clocks = <&h32ck>;
status = "disabled";
nand_controller: nand-controller {